Some NXP boards program the read parameters bits (P[6:3]) within the
IS25WP flash device during init, which will result in JESD216 probe
commands failing (as the number of dummy cycles will be incorrect). Add
handling to force these volatile bits to their default value to the
flexspi flash driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Quad enable method 5 reads status register 2 (one byte), but then writes
to 2 bytes to the status registers, so we need to shift the output
buffer in order to manage this correctly.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Writing the quad enable bit on flash chips typically requires a write
enable instruction be issued before writing the non-volatile status
register, and the flash may remain busy briefly after programming this
bit. Add code to send the WREN instruction, and to wait for the flash to
finish programming after writing the status register.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move the LUT used for probing to be stored in .data, instead of on the
stack. This reduces stack usage during probe by 192 bytes, which avoids
stack overflows that were occurring on some platforms.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Even in cases where the alt-addr is set, we can still use the INT pin
during probe. Some boards require this, as if a reset GPIO is not
defined the INT pin may still need to be toggled in order to initialize
the GT911 IC correctly.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit updates the CI workflows to use the CI image v0.27.3, which
includes Zephyr SDK 0.17.0.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit increases the test timeout for the wait queue benchmark tests
to 120 seconds because these tests frequently hit the default timeout of 60
seconds during execution.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
We now use hwmv2 to list boards instead of relying on twister specific
config files.
One yaml files (twister.yaml for now) will have all the data needed for
all possible targets and variations of a board reusing most of the data
where possible and variations can override the top level data.
Twister keeps track of 'aliases' of boards and identifies that for
example native_sim is the same as native_sim/native, so either names
will be possible in both test yaml files or on the command line,
however, the reporting will always use the full name, so no there is no
confusion about what is being tested/built.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
- Following similar approach followed on spi_mcux_lpspi driver.
- Enabling DMA by default when SPI RTIO is selected to favor
non-blocking transfers.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Updated ADXL372 driver with RTIO stream functionality.
RTIO stream is using both FIFO threshold and FIFO full triggers.
Together with RTIO stream, RTIO async read is also implemented.
Signed-off-by: Vladislav Pejic <vladislav.pejic@orioninc.com>
Enable support for FRDM_RW612 with memc driver sample, using attached
aps6404l PSRAM.
Signed-off-by: David Missael Maciel <davidmissael.maciel@nxp.com>
Some instances of the FLEXSPI IP permit limiting AHB bus access so that
no memory access requests will straddle a page boundary. Add a property
to manage this setting.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
is66wvq8m4 PSRAM always requires the address to be left shifted by
5 bits, regardless of which FLEXSPI port it is on. Fix the addressShift
assignment to be unconditional
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The ADDRSHIFT bit simply left shifts the address written to IPCR0[SFAR],
(or the address used for AHB access), by 5 bits before sending it to the
attached memory. This bit does not have an effect on the base address
used to access the flash/psram device.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Transactions should result in a single transfer call not multiple
transfer calls. Transceive isn't supported by i2c and so the TXRX op
isn't validated for success anymore.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Transactions from RTIO should result in single calls to i2c_transfer.
This corrects the default handler to first count the number of
submissions in the transaction, allocate on the stack, and then copy
over each submission to an equivalent i2c_msg.
It also cleans up the helper functions to be infallible, taking only the
submission and msg to copy to.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
TXRX is meant specifically to handle a full duplex bus like SPI, I2C is
half duplex meaning only read or write can be performed at once.
Drop TXRX as a supported operation code for the default I2C submission
path.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Updated ADXL345 driver with RTIO stream functionality.
Added Trigger intterupt functionality. RTIO stream is using
FIFO threshold.Together with RTIO stream, RTIO async read
is also implemented.
Signed-off-by: Dimitrije Lilic <dimitrije.lilic@orioninc.com>
The commit introduced regression for hsdk4xd platform.
The hsdk4xd SoC setup from soc_early_asm_init_percpu need to be done
in early code before any C code execution.
The current approach has multiple issues
- we call function (which can be easily implemented in C for
this or other SoC) from the place where we haven't setup stack
pointer (so we can't use stack) - which is very error-prone
- we never return back from soc_reset_hook on hsdk4xd platform
So let's just revert it for now. If any other ARC SoC need to use
soc_reset_hook - than it can be implemented properly.
This reverts commit 8c32a82e47.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Fixes commit 1df078158f ("doc: build: Add signing page") that removed
the `imgtool` section from the `sign.rst` page.
rimage configuration was designed in a very different way from imgtool
configuration. The rimage doc section was following the imgtool doc
section and constrating the two approaches. Now that the previous
imgtool doc section has just been removed, some words like "different"
and "instead" don't make sense anymore. Drop them.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Adds a new shield definition for the Analog Devices EVAL-ADXL362-ARDZ
accelerometer shield. This shield provides support for an ADI ADXL362
3-axis accelerometer over an Arduino SPI connector.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Output the timestamp of the PPS timepulse when printing the fix
information, if the driver support the timepulse and it has started
toggling.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add an API function for retrieving the timestamp of the latest PPS
timepulse at the highest resolution we have available, the kernel tick
count.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add overlay for APARD32690 board and add a new test case to
test RTIO functionalities of SPI MAX32 driver.
Signed-off-by: Dimitrije Lilic <dimitrije.lilic@orioninc.com>
Implements the SPIO RTIO API. Refactors internal transcive
fucntios to work with both existing SPI API and RTIO functions.
When SPI_RTIO is enabled the spi_transcieve call translates
the request into an RTIO transaction placed in the queue
that device will execute.
Include the latest refacor changes of RTIO.
Signed-off-by: Dimitrije Lilic <dimitrije.lilic@orioninc.com>
Function dma_smartbond_set_channel_status() used incorrect
condition to release state lock.
In initialization function dma_smartbond_init() function
dma_smartbond_set_channel_status() was called for each DMA
channel and tried to release lock that was never taken.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Timer driver using Microchip 32KHz based RTOS timer as the kernel
timer tick. The driver uses one of the 32-bit basic timers to
support the kernel's k_busy_wait API which is passed a wait
count in 1 us units. The 32-bit basic timer is selected by using
device tree chosen rtimer-busy-wait-timer set to the handle
of the desired 32-bit basic timer. If this driver is disabled,
the build system will select the ARM Cortex-M4 SysTick as the
kernel timer tick driver. The user should specify RTOS timer
as kernel tick by adding the compatible properity and setting
the status property to "okay" at the board or application level
device tree. The driver implements two internal API's for use
by the SoC PM. These two API's allow the SoC PM layer to disable
the timer used for k_busy_wait so the PLL can be disabled in
deep sleep. We used a custom API so we can disable this timer
in the deep sleep path when we know k_busy_wait will not be
called by other drivers or applications.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Series 2 always uses the device init HAL, while Series 0/1 never do.
Create a separate soc.c for Series 2 to make both versions easier to read.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Daniel DeGrasse