CONFIG_KERNEL_COHERENCE forbids synchronized data on the stack: no
spinlocks, IPC primitives, or things that contain them. Application
code obviously doesn't have to follow these inconvenient rules, but
our test code needs to run on platforms with incoherent stack memory.
Make these things static.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Turns out that the user can configure the "zephyr.elf" name via
kconfig to be "something_else.elf" instead. And there's a test the
does this. Use the right variable; don't hardcode.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This was added early when we had (somewhat oddly) a log subsystem
backend but not a printk char_out hook. Now we have one backend that
works with both. No need, and this fixes build errors with a handful
of tests that specify LOG_MINIMAL (LOG_PRINTK requires the full log
subsystem and doesn't work with MINIMAL).
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This platform has a newlib which is inexplicably missing a
_gettimeofday_r symbol. Just filter the test there.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
In commit efa05d1e42 ("soc/intel_adsp: Put initial stack into the
CPU0 interrupt stack") the "_end" symbol was accidentally removed from
the linker script. Newlib needs this to size its heap.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Many platforms don't have a console backend, and this fails with a
kconfig warning if you try to build on them.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
All users of ATMEL_SAM0_DT_INST_DMA_NAME are now using
ATMEL_SAM0_DT_INST_DMA_CTLR so we can remove the macro.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a macro similar to ATMEL_SAM0_DT_INST_DMA_NAME but instead
provides the devicetree node back via DT_INST_DMAS_CTLR_BY_NAME
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Null-pointer exception detection using DWT is currently incompatible
with current openocd runner default implementation that leaves debug
mode on by default.
As a consequence, on all targets that use openocd runner, null-pointer
exception detection using DWT will generated an assert.
As a consequence, all tests are failing on such platforms.
Disable this until openocd behavior is fixed (#32984) and enable
the MPU based solution for now.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This test understood that it can't demand equality in timing because
of races against real time, so it simply validated that the test
started at or later than the expected timeout expiration.
But when calculating the expected time, it called k_uptime_ticks()
AFTER the timeout was registered. So on systems with fast ticks (or
just bad luck) a tick expiring between the two steps will look like an
"early" expiration and fail the test. Do things in the proper order.
Also, use the correct APIs for unit conversion and timeout
construction.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The error code from gatt_service_register is being ignored to ensure
that repeated actions still complete. Do this explicitly by adding
(void) casts, resolving coverity warnings on accidental error code
ignores.
Fixes#33051.
Fixes#33074.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
If CONFIG_BT_MESH_SEQ_STORE_RATE is 1, the check in store_seq can be
reduced to a simple if (false), and the modulo code does not need to be
included in the build.
Fixes#33036.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
Moves the if !(pub) check to happen before it gets used in the
initialization of the message context in bt_mesh_model_publish.
Fixes#5116.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
Include virtual label's pending_store function in the LABEL_COUNT > 0
compile guard to avoid including dead iteration code in the compilation.
Fixes#32928.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
Check that the assigned subnet hasn't been removed in heartbeat_send to
avoid potential NULL defererence in transport's ctl_send.
Fixes#32907.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
Some toolchain variants come with no clang support, so do not assume
clang by default and enable this using the enviornment variable
XCC_USE_CLANG.
export XCC_USE_CLANG=1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
There is a race between k_sem_take() and k_object_access_grant() so it
is possible (especially when testing SMP) that the thread tries to take
the semaphore before the originating thread has had the chance to
grant it permission.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Use kinetis SIM clock divider options set in device tree
instead of hardcoded values.
The kl25z device tree did not previously define a MCG node.
This has now been added with the general "nxp,kinetis-mcg"
binding.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
Use kinetis SIM clock divider options set in device tree
instead of kconfig.
The kv5x device tree originally used the undefined
"nxp,kv58-mcg" binding for the MCG node. This has been
replaced by the general "nxp,kinetis-mcg" binding.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
Use kinetis SIM clock divider options set in device tree
instead of kconfig.
Both the kw40z and kw41z device tree originally used an
undefined "nxp,kw41z-mcg" binding for the MCG node.
This has been replaced with the general "nxp,kinetis-mcg"
binding instead.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
SYSCLK_DEFAULT_IOSC_HZ and BUSCLK_DEFAULT_IOSC_HZ are
not used anywhere in the tree and can be removed
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
Add MCGOUTCLK define to kinetis_mcg.h to make it possible to
use \`<&mcg KINETIS_MCG_OUT_CLK>\` in device tree.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
Add testcase for deadline_set. Test the situation when threads are
in unqueued state. The k_thread_deadline_set() call should not make
these threads run before there delay time pass.
Signed-off-by: Ying ming <mingx.ying@intel.com>
The test granted access to the user work queue stack from the user
work thread; this was done by k_work_user_queue_start() so was
unnecessary. Document why it's ok to grant other access after the
work thread was started.
Fix a race condition where the non-work user thread might have started
before it was given access to the resources it needs.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The code here was written to "get out of the way just long enough for
the trivial context switch and callback to execute". But on a machine
with 50 kHz ticks, that's not reliably enough time and this was
failing spuriously. Which would have been a reasonably forgivable
mistake to make had I not written this code with this very machine in
mind...
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
These tests would pass pointers to data on their own stacks to other
threads, which is forbidden when CONFIG_KERNEL_COHERENCE (because
stack memory isn't cache-coherent). Make the variables static.
Also, queue had two sleeps of 2 ticks (having been written in an era
where that meant "20-30ms"), and on a device with a 50 kHz tick rate
that's not very much time at all. It would sometimes fail spuriously
because the spawned threads didn't consume the queue entries in time.
How about 10ms of real time instead?
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
When we reach this code in interrupt context, our upper GPRs contain a
cross-stack call that may still include some registers from the
interrupted thread. Those need to go out to memory before we can do
our cache coherence dance here.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Putting spinlocks (or things containing them) onto the stack is a
KERNEL_COHERENCE violation. This doesn't need to be there so just
make it static.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Both new thread creation and context switch had the same mistake in
cache management: the bottom of the stack (the "unused" region between
the lower memory bound and the live stack pointer) needs to be
invalidated before we switch, because otherwise any dirty lines we
might have left over can get flushed out on top of the same thread on
another CPU that is putting live data there.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The Xtensa L1 cache layer has straightforward semantics accessible via
single-instructions that operate on cache lines via physical
addresses. These are very amenable to inlining.
Unfortunately the Xtensa HAL layer requires function calls to do this,
leading to significant code waste at the calling site, an extra frame
on the stack and needless runtime instructions for situations where
the call is over a constant region that could elide the loop. This is
made even worse because the HAL library is not built with
-ffunction-sections, so pulling in even one of these tiny cache
functions has the effect of importing a 1500-byte object file into the
link!
Add our own tiny cache layer to include/arch/xtensa/cache.h and use
that instead.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Back when I started work on this stuff, I had a set of notes on
register windows that slowly evolved into something that looks like
formal documentation. There really isn't any overview-style
documentation of this stuff on the public internet, so it couldn't
hurt to commit it here for posterity.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Instead of passing the crt1 _start function as the entry code for
auxiliary CPUs, use a tiny assembly stub instead which can avoid the
runtime testing needed to skip the work in _start. All the crt1 code
was doing was clearing BSS (which must not happen on a second CPU) and
setting the stack pointer (which is wrong on the second CPU).
This allows us to clean out the SMP code in crt1.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Andy Ross