There are a number of platforms that the x_nucleo_eeprma2 eeprom sample
can't build on. Also fix issue with missing include of <mem.h> header
to get DT_SIZE_* macros used by the overlay.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Pull request https://github.com/zephyrproject-rtos/zephyr/pull/24873
marked all the struct devices const.
However, the linker scripts were never updated to actually allocate
the struct devices in ROM. They're still in RAM, so the main benefit
of this work has not been realized.
Fix it.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Now that we've split out the build_all test there are a few left
over files that aren't needed any more.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The clock control & general driver build tests as they don't get
us any additional coverage then from what we get from the build all
test of tests/kernel/common/kernel.common on all platforms.
Additionally, remove drivers.conf as the file isn't used in any tests.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Function 'nrf_802154_transmitted_timestamp_raw' is not serialized and
connot be used for multi-core devices yet.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
The timings were too tight for TLS tests executing on nRF52840 with
hardware entropy source enabled. Increase the timings to make tests
pass.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Update the hal_nordic module revision, to have Doxygen doc
fixes that solves warnings about non-existing CHANGELOG.md file
and nrfx_atomic Doxygen group.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Add Kconfig options that allow configuration of optional internal
load capacitors for the high-frequency (HFXO) and low-frequency
(LFXO) crystal oscillators in nRF5340.
Default settings used for the new options are those that have been
in effect so far, i.e. external load capacitors for HFXO and 6 pF
internal capacitance for LFXO.
This commit also adds missing SOC_ENABLE_LFXO option dependency on
!TRUSTED_EXECUTION_NONSECURE.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add the option to send logs to fs backend using new dictionary
formatting
This can result in much better use of filesystem space
Signed-off-by: Elliot Revell-Nash <elliot.revell-nash@wdtl.com>
When SMP enabled, the primary core calls arch_start_cpu to start
secondary cpus. There is an assertion checking the core mpid to make
sure it is called by primary core.
But the checking is bogus. After the first secondary core is brought
up, arm64_cpu_boot_params.mpid will be changed, which will fail the
assertion.
The current solution restores the arm64_cpu_boot_params.mpid.
However, using the arch_curr_cpu()->id == 0 as the assertion will be
better.
The _current_cpu->id will always fail assertion inside this macro
(__ASSERT_NO_MSG(!z_smp_cpu_mobile()), so I use arch_curr_cpu()->id
instead.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
This allows the current speed of the connection (100Mbps/10Mbps) and
if it is operating in half or full duplex to be queried
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
The enc424j600 chipet has 1-byte commands to enable or disable
interrupts which an be used rather than the currently used 4-byte
commands to speed the process up by a factor of 4x
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
Code snippet to demonstrate use of 'zephyr,user' binding
for gpio pin was missing a #define to easily get the code
compiling.
Fix this.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When the Bluetooth stack is configured for CONFIG_BT_MAX_CONN > 1
the oldest key might currently be in use. Fix the logic to ensure the
oldest key overwritten is from the set of keys currently not in use.
Fixes: https://github.com/zephyrproject-rtos/zephyr/issues/35999
Signed-off-by: Faisal Saleem <faisal.saleem@setec.com.au>
Signed-off-by: Nick Ward <nick.ward@setec.com.au>
In unshared FP mode, only 1 thread can use FPU but kernel doesn't know
which one, so riscv arch would enable FPU of each thread.
Signed-off-by: Jim Shu <cwshu@andestech.com>
In order to increase test coverage, this commit updates the libcxx test
to run with both full and nano variants of the newlib.
Note that C++ exception handling feature is only enabled for the newlib
full variant because the nano variant does not support C++ exception
handling.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Use the full version of newlib (i.e. not nano) for libcxx testing since
some features (e.g. C++ exception handling) require the full version of
newlib.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit makes C++ exception handling feature depend on the full
version of newlib (i.e. `CONFIG_NEWLIB_LIBC_NANO=n`).
The `nano.specs`, which selects the nano variant of newlib, libstdc++,
and libsupc++, does not support C++ exception handling because its
lib*c++ is compiled with `-fno-exceptions`.
For more details, refer to the issue #35972.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The `.eh_frame_hdr` and `.eh_frame` ROM sections, which contain read-
only C++ exception handling information, are currently specified in
`cplusplus-ram.ld`, and this can cause the linker output location
counter to take a ROM region address while in the RAM region.
This commit relocates these sections to `cplusplus-rom.ld` in order to
prevent the linker output location counter from getting corrupted.
For more details, refer to the issue #35972.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
As there are a lot of PCI IDs for various devices, identifying
the ADSP this way will be hard to maintain.
Implement a more generic device look-up using the PCI vendor and class
information to detect a compatible ADSP.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Porting code from mimxrt1050_evk to this board to enable use of the SD
card. Note that this board does not have the power pin connected to the
SD card and must use the no-1-8-v option for the USDHC driver as in
PR #34205 for the mm_swiftio.
Tested with samples/subsys/fs/fat_fs.
Signed-off-by: Jake Mercer <jake.mercer@civica.co.uk>
The flash write function casts a void * to flash_prg_t, which can be 2,
4 or 8 bytes long depending on the SoC. This can trigger a hard fault
exception if data is not aligned, such as when passing a constant string
from settings_save_one().
Copying the chunk of data to a temporary variable on the stack to avoid
the problem.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Commit 95b916d104 ("drivers: wifi: esp32: fix reconnect issue")
switched from thread created at runtime to statically defined thread.
The difference is mainly visible for simple applications that use
CONFIG_NET_CONFIG_AUTO_INIT=y, where networking setup code is executed
before main() and any statically defined threads. All ESP32 events are
just queued and never handled, so conditions enforced by
CONFIG_NET_CONFIG_NEED_IPV4=y are never met (e.g. Zephyr networking
layer is never informed about being connected).
Switch back to thread created at runtime, which starts at the moment
when k_thread_create() is invoked. This allows ESP32 event processing to
happen just after ESP32 WiFi driver gets initialized and before Zephyr
network auto initialization code (CONFIG_NET_CONFIG_AUTO_INIT=y).
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
This commit adds a closing parenthesis for soc model of stm32g050.
Resolves issue #36014
Signed-off-by: Bhavesh Bhojwani <bhaavesh.bhojwaani@gmail.com>
sample.drivers.eeprom.shield.x_nucleo_eeprma2 sample variant
should be run in CI bench only if shield is present on board.
Add a harness_config to specify the fixture check
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The idea of having default platforms is to prioritize running tests over
just building them. We do not have NSIM in CI and thus we are just
building for those platforms without running the tests, so, we spend
lots of time building on PRs which slows everything down. This is
already done in the daily builds.
We now have Qemu covering ARC. If we can get NSIM into CI, then we
should reconsider enabling some NSIM platforms.
Leaving hs_smp and _sem for coverage, we do not have other platforms
covering those.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The usage of -W may lead to the loss of the Sphinx build environment
even for small typos. Remove this option from the defaults but still
enable it on CI, where the fail-fast behavior given by -W is desired.
Fixes#36033
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify the the AT2x EEPROM instance initialization macro a bit by
converting it to use the new DT helper macros for SPI and GPIO.
This also saves a few bytes when only AT24 support is enabled.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fill the ACK timestamp field in nRF5 driver. This is required by
OpenThread for the proper CSL transmitter functioning.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
The AUDIT_LOG partition cannot be used in TF-M builds
with the IPC mode (CONFIG_TFM_IPC=y); we have added a
relevant dependency for this. So we can cleanup the
CONFIG_TFM_PARTITION_AUDIT_LOG=n from the configuration
files of the samples.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add `hwinfo_get_reset_cause` and `hwinfo_clear_reset_cause` to retrieve
and to clear cause of system reset on supported platforms.
Different platforms can provide different causes of reset, however
there is a great deal of overlap. `enum reset_cause` can be expanded in
the future to support additional reasons, as additional platforms are
supported.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Both NPCX7/9 uses the IRQs at the end of the vector table, for example,
the IRQ 60 and 61 used for Multi-Input Wake-Up Unit (MIWU) devices by
default, and conflicts with ISR used for testing.
This CL changes TEST_NUM_IRQS (The value is changed from 46 to 44) to
move IRQ used for this test suite from 42 to 40 which is reserved in
both NPCX7 and NPCX9 series to resolve the issue.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Introduce the npcx9m6f_evb board driver. NPCX9M6F_EVB board is a
development platform to evaluate the Nuvoton NPCX9 series
microcontrollers. This board needs to be mated with part number
NPCX996F.
It also includes:
1. Add CONFIG_BOARD_NPCX9M6F_EVB definition for adc test suite.
2. Add npcx7m6f_evb.overlay file for gpio test suite.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL adds the support for npcx9m3f and npcx9m6f chips in ecst.py
script which generates the NPCX firmware header.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Fixed mutli-IP DNS resolution as previously the same IP address was
used to populate all AI entries and added DNS_RESOLVER_AI_MAX_ENTRIES
config entry to define max number of IP addresses per DNS name to be
handled.
Signed-off-by: Ievgen Glinchuk <john.iceblink@gmail.com>
Propagate Download and Execute (DnX) entry warning.
Add missing handler for SUS warning power down ack.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Kumar Gala