2 Commits

Author	SHA1	Message	Date
Jean-Paul Etienne	dae36b97e8	riscv32: added support for the riscv32-qemu soc ... Change-Id: I7cf71f7a99fed7c83ed761ead9295697929d767d Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>	2017-01-13 19:57:51 +00:00
Jean-Paul Etienne	2a8cfca4cf	riscv32: added support for the pulpino soc ... pulpino soc has custom-extended riscv ISA that is accounted for if CONFIG_RISCV_GENERIC_TOOLCHAIN is not set. (ex: bit manipulation asm opcodes) Change-Id: I4dafc4ebc2fedcc4eb6a3dedd0412816afea6004 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>	2017-01-13 19:55:05 +00:00