Macro is used to create a structure to specify the boot time
page table configuration. Needed by the gen_mmu.py script to generate
the actual page tables.
Linker script is needed for the following:
1. To place the MMU page tables at 4KByte boundary.
2. To keep the configuration structure created by
the Macro(mentioned above).
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Inserting the IDT results in any data afterwards being shifted.
We want the memory addresses between the zephyr_prebuilt.elf
and zephyr.elf to be as close as possible. Insert some dummy
data in the linker script the same size as the gen_idt data
structures. Needed for forthcoming patches which generate MMU
page tables at build time.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
For various reasons its often necessary to generate certain
complex data structures at build-time by separate tools outside
of the C compiler. Data is populated to these tools by way of
special binary sections not intended to be included in the final
binary. We currently do this to generate interrupt tables, forthcoming
work will also use this to generate MMU page tables.
The way we have been doing this is to generatea "kernel_prebuilt.elf",
extract the metadata sections with objcopy, run the tool, and then
re-link the kernel with the extra data *and* use objcopy to pull
out the unwanted sections.
This doesn't scale well if multiple post-build steps are needed.
Now this is much simpler; in any Makefile, a special
GENERATED_KERNEL_OBJECT_FILES variable may be appended to containing
the filenames to the generated object files, which will be generated
by Make in the usual fashion.
Instead of using objcopy to pull out, we now create a linker-pass2.cmd
which additionally defines LINKER_PASS2. The source linker script
can #ifdef around this to use the special /DISCARD/ section target
to not include metadata sections in the final binary.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Historically, space for struct k_thread was always carved out of the
thread's stack region. However, we want more control on where this data
will reside; in memory protection scenarios the stack may only be used
for actual stack data and nothing else.
On some platforms (particularly ARM), including kernel_arch_data.h from
the toplevel kernel.h exposes intractable circular dependency issues.
We create a new per-arch header "kernel_arch_thread.h" with very limited
scope; it only defines the three data structures necessary to instantiate
the arch-specific bits of a struct k_thread.
Change-Id: I3a55b4ed4270512e58cf671f327bb033ad7f4a4f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
We reserve a specific vector in the IDT to trigger when we want to
enter a fatal exception state from software.
Disabled for drivers/build_all tests as we were up to the ROM limit
on Quark D2000.
Issue: ZEP-843
Change-Id: I4de7f025fba0691d07bcc3b3f0925973834496a0
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Unlike assertions, these APIs are active at all times. The kernel will
treat these errors in the same way as fatal CPU exceptions. Ultimately,
the policy of what to do with these errors is implemented in
_SysFatalErrorHandler.
If the archtecture supports it, a real CPU exception can be triggered
which will provide a complete register dump and PC value when the
problem occurs. This will provide more helpful information than a fake
exception stack frame (_default_esf) passed to the arch-specific exception
handling code.
Issue: ZEP-843
Change-Id: I8f136905c05bb84772e1c5ed53b8e920d24eb6fd
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types. This handles the remaining includes and kernel, plus
touching up various points that we skipped because of include
dependancies. We also convert the PRI printf formatters in the arch
code over to normal formatters.
Jira: ZEP-2051
Change-Id: Iecbb12601a3ee4ea936fd7ddea37788a645b08b0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is a start to move away from the C99 {u}int{8,16,32,64}_t types to
Zephyr defined u{8,16,32,64}_t and s{8,16,32,64}_t. This allows Zephyr
to define the sized types in a consistent manor across all the
architectures we support and not conflict with what various compilers
and libc might do with regards to the C99 types.
We introduce <zephyr/types.h> as part of this and have it include
<stdint.h> for now until we transition all the code away from the C99
types.
We go with u{8,16,32,64}_t and s{8,16,32,64}_t as there are some
existing variables defined u8 & u16 as well as to be consistent with
Zephyr naming conventions.
Jira: ZEP-2051
Change-Id: I451fed0623b029d65866622e478225dfab2c0ca8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Scanning for typos in comments and strings.
Change-Id: I3d4db89e0824959252c79c19baa50028354247bd
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Current users of sys_bitfield*() are bending over backwards to cast
what is most of the times a pointer into an integer.
Bitfields can be better described with an void *, so
uint{8,16,32,64}_t or any other container can be used. Most
sys_bitfield*() operations, by extension, can do the same. Note void *
has byte arithmetic, like char *.
This change will also make it implicit, for any future split of the
address space between virtual (what the SW is seeing) and physical
(what the HW is seeing) way clearer, as the functions dealing with
physical, non directly referentiable/mappeable addreses to use an
integer type, like mem_addr_t.
- include/arch/ARCH/*asm_inline*:
- sys_bitfield*() all modified to take 'void *'
Note 'void *' arihtmethic is byte based, which makes some things
easier.
- include/sys_io.h:
- introduces DEFINE_BITFIELD
- update docs
- tests/kernel/bitfield: remove all the cast contortions, use DEFINE_BITFIELD
PENDING: update other TCs
- include/arch/nios/nios2.h, drivers/interrupt_controller/ioapic_intr.c:
remove cast contortions
Change-Id: I901e62c76af46f26ff0d29cdc37099597f884511
Jira: ZEP-1347
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
It's not entirely clear where the '%P' came from, but the proper,
documented operand modifier for inserting an immediate value without
punctuation is '%c'.
Change-Id: I17346a6c70183ce79e91faa2fbe61e7761dfd513
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Some arches may want to define this as an inline function, or
define in core arch code instead of timer driver code.
Unfortunately, this means we need to remove from the footprint
tests, but this is not typically a large function.
Issue: ZEP-1546
Change-Id: Ic0d7a33507da855995838f4703d872cd613a2ca2
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
In order for OpenOCD to have a high-level view of an RTOS, it uses the
GDB protocol to obtain symbols from the system.
The GDB protocol, however, does not allow obtaining fields from
structures directly, and hardcoding offsets is not only brittle (due to
possibly different architectures or changes in the code), it's also
infeasible considering Zephyr is highly-configurable and parts of key
structs can be compiled in or out.
Export an array with offsets for these key structs. Also add a version
element in that array to allow changes in those structs.
Change-Id: I83bcfa0a7bd57d85582e5ec6efe70e1cceb1fc51
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
nano_cpu_idle/nano_cpu_atomic_idle were not ported to the unified
kernel, and only the old APIs were available. There was no real impact
since, in the unified kernel, only the idle thread should really be
doing power management. However, with a single-threaded kernel, these
functions can be useful again.
The kernel internals now make use of these APIs instead of the legacy
ones.
Change-Id: Ie8a6396ba378d3ddda27b8dd32fa4711bf53eb36
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Memory accesses could be reordered before an irq_lock() or after an
irq_unlock() without the memory barriers.
See commit 15bc537712 for the ARM fix for
a complete description of the issue and fix.
Change-Id: Ic92a6b33f62a938d2252d68eccc55a5fb07c9114
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
If a particular project needs to add additional data to the
binary image, in most cases the entire linker script needs to
forked into the project space, causing maintenance issues if
the main linker script is changed.
Now we add some Kconfig options to allow a project to specify
some additional linker scripts which get included by the main
one in a few key areas:
1) In the definition to the 'rodata' section, which can allow
additional data to be included in this ROM section.
2) In the definition to the 'datas' section, which allows
additional data to be included in this RAM section.
3) Arbitrary additional sections to be included at the end of
the binary.
For 1 and 2, this is useful to include data generated outside of
the normal C compilation, such as data structures that are created
by special build tools.
3 is useful for including arbitrary binary blobs inside the final
image, such as for peripheral or co-processor firmware.
Change-Id: I5738d3d6da25f5bc96cda8ae806bf1a3fb34bd5d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Sets the interrupt descriptor table in C domain.
Change-Id: Ia8d2f585ebf60464aeedf2a54363e4683cf257a5
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The pointer value needs to be dereferenced first.
Change-Id: I80d8a9b4837adfc7d0efc69c229c863d05e52a93
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
It is referred to as D/B in the Intel manuals.
Change-Id: If021d875da2d83a256926d9233f1559c8c2ed1db
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Most kernel APIs are now ready for inclusion in the API guide.
The APIs largely follow a standard template to provide users
of the API guide with a consistent look-and-feel.
Change-Id: Ib682c31f912e19f5f6d8545d74c5f675b1741058
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Updates x86 floating point support to reflect changes that have
been made in recent months.
* Many, many, many cosmetic changes (mostly revisions to comments).
* Elimination of unnecessary function aliases that were needed
to support the task and fiber versions of certain APIs.
* Elimination of run-time code to enable a thread's "FP regs"
option bit if the "SSE regs" option bit was set. The kernel
now recognizes that the thread is using the FPU as long as
either option bit is set. (If the thread has both option bits
enabled this is the same as if only the "SSE regs" bit is set.)
Change-Id: Ic12abc54b6fa78921749b546d8debf23e7ad232d
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
C++ support moved from nanokernel.h to kernel.h.
Change-Id: I5e1631941e26f4ab3f311b680267b743bab15e40
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Symbols now use the K_ prefix which is now standard for the
unified kernel. Legacy support for these symbols is retained
to allow existing applications to build successfully.
Change-Id: I3ff12c96f729b535eecc940502892cbaa52526b6
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
There are a number of data sections that are repeated across
all the linker scripts for various architecture. In practice these
don't always get updated and we have had problems with bit-rot.
Consolidate these to make maintenance easier.
x86 linker scripts now follow the same naming convention and we
get rid of a linker-epilog.h that wasn't necessary and whose purpose
has been lost to the mists of time. If applications want to define their
own sections they should be allowed to. Linker scripts for x86 do not
end with .h any more, they are not C header files even though we use
C's preprocessor.
Issue: ZEP-688
Change-Id: I893eb4619969695c1f980efd7c2ec9fa5dad136d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This is used by a test case, and it's better to just put this
here instead of forking the linker scripts.
Change-Id: Ifbb90b73bb26118ae2422cc6feccb3db58a26f2c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This mechanism was intended to reserve space during the first pass for
certain data structures created by gen_idt, but this is unnecessary.
The only memory addresses that must be fixed between the two passes are the
locations of the interrupt stubs, which are in the .text section much
earlier than the generated data structures; they do not shift.
Change-Id: I3aab00e171e6a9ff439a7af8d69769e4c29337a7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Binutils ld has an annoying misfeature (apparently a regression from a
few years ago) that alignment directives (and alignment specifiers on
symbols) apply only to the runtime addresses and not, apparently, to
the load address region specified with the "AT>" syntax. The net
result is that by default the LMA output ends up too small for the
addresses generated in RAM. See here for some details:
https://sourceware.org/ml/binutils/2013-06/msg00246.htmlhttps://sourceware.org/ml/binutils/2014-01/msg00350.html
The required workaround/fix is that AFAICT any section which can have
inherit a separate VMA vs. LMA from a previous section must specify an
"ALIGN_WITH_INPUT" attribute. Otherwise the sections will get out of
sync and the XIP data will be wrong at runtime.
No, I don't know why this isn't the default behavior.
A further complexity is that this feature only works as advertised
when the section is declared with the "AT> region" syntax after the
block and not "AT(address)" in the header. If you use the header
syntax (with or without ALIGN_WITH_INPUT), ld appears to DOUBLE-apply
padding and the LMA ends up to big. This is almost certainly a
binutils bug, but it's trivial to work around (and the working syntax
is actually cleaner) so we adjust the usage here.
Note finally that this patch includes an effective reversion of commit
d82e9dd9 ("x86: HACK force alignment for _k_task_list section"), which
was an earlier workaround for what seems to be the same issue.
Jira: ZEP-955
Change-Id: I2accd92901cb61fb546658b87d6752c1cd14de3a
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Interrupt stubs now just push the ISR and parameter onto the stack
and jump to the common interrupt code, never to return.
Change-Id: I82543d8148b5c7dfe116c43f41791f852614bb28
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Due to the memory pool structure only static declaration of
memory pool is possible.
Change-Id: I4797ed88fd2ac3b7812ff26e552e1745611c4575
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
This header has a bunch of data structure definitions and macros useful
for manipulating segment descriptors on X86. The old IDT_ENTRY defintion
is removed in favor of the new 'struct segment_descriptor' which can be
used for all segment descriptor types and not just IRQ gates.
We also add some inline helper functions for examining segment registers,
descriptor tables, and doing far jumps/calls.
Change-Id: I640879073afa9765d2a214c3fb3c3305fef94b5e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The Arduino 101 comes with a bootloader that supports DFU
and flashing of all cores using the dfu-util package.
This changes the memory layout of the image built for the
Arduino 101 and remove previous work-arounds to allow booting,
including the version-header section in the linker script.
The bootloader expects the text section at +0x30 from the physical
load address and thus requires special treatment in the linker
script.
Other changes by Andrew Boie:
The flash size parameters were both wrong. X86 side has 192K
of flash from 0x4003000 - 0x40060000, the entire span of
sys_flash1.
ARC side is now the span from 0x40010000 - 0x40030000, 128K.
Change-Id: Iecfa5d2b84a3f522d9eca06268d6b8b71a094aaa
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
In 1.0 you could set only one callback on the whole gpio controller. It
was impossible for another sub-system to add another callback, without
overwritting an existing one.
Such API has been obsolete for a long time and no one is using it
anymore. Thus removing it entirely.
Change-Id: I6a17fd99373dc6cef1fa2ebb421e992412d5015e
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The x86 architecture port is fitted with support for the unified kernel,
namely:
- the interrupt exit code now calls _Swap() if the current
thread is not a coop thread and if the scheduler is not locked
- there is no 'task' fields in the _nanokernel anymore: _Swap()
now calls _get_next_ready_thread instead
- the _nanokernel.fiber field is replaced by a more sophisticated
ready_q, based on the microkernel's priority-bitmap-based one
- nano_private includes nano_internal.h from the unified directory
- the FIBER, TASK and PREEMPTIBLE flags do not exist anymore: the thread
priority drives the behaviour
- the tcs uses a dlist for queuing in both ready and wait queues instead
of a custom singly-linked list
- other new fields in the tcs include a schedule-lock count, a
back-pointer to init data (when the task is static) and a pointer to
swap data, needed when a thread pending on _Swap() must be passed more
then just one value (e.g. k_stack_pop() needs an error code and data)
- fiberRtnValueSet() is aliased to _set_thread_return_value since it
also operates on preempt threads now
- _set_thread_return_value_with_data() sets the swap_data field in
addition to a return value from _Swap()
- convenience aliases are created for shorter names:
- _current is defined as _nanokernel.current
- _ready_q is defined as _nanokernel.ready_q
- _Swap() sets the threads's return code to -EAGAIN before swapping out
to prevent timeouts to have to set it (solves hard issues in some
kernel objects).
- Floating point support.
Note that, in _Swap(), the register holding the thread to be swapped in has
been changed from %ecx to %eax in both the legacy kernel and the unified kernel
to take advantage of the fact that the return value of _get_next_ready_thread()
is stored in %eax, and this avoids moving it to %ecx.
Work by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Allan Stephens <allan.stephens@windriver.com>
Benjamin Walsh <benjamin.walsh@windriver.com>
Change-Id: I4ce2bd47bcdc62034c669b5e889fc0f29480c43b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Commit 3e63a74514 did not revert properly
things.
Change-Id: I792d5698966542ce2cfb9f858c56b30c392f02a2
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
You can't query the LOAPIC for every kind of interrupt that fires,
it has no idea about IRQs that were generated by an 'int' instruction
for example. Extend the semantics of _irq_controller_isr_vector_get()
to return -1 if the vector can't be identified.
Issue: ZEP-602
Change-Id: I1174aa62fbedffdcd329d60da8ef14fabb042dc3
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Originally, x86 just supported APIC. Then later support
for the Mint Valley Interrupt Controller was added. This
controller is mostly similar to the APIC with some differences,
but was integrated in a somewhat hacked-up fashion.
Now we define irq_controller.h, which is a layer of abstraction
between the core arch code and the interrupt controller
implementation.
Contents of the API:
- Controllers with a fixed irq-to-vector mapping define
_IRQ_CONTROLLER_VECTOR_MAPPING(irq) to obtain a compile-time
map between the two.
- _irq_controller_program() notifies the interrupt controller
what vector will be used for a particular IRQ along with triggering
flags
- _irq_controller_isr_vector_get() reports the vector number of
the IRQ currently being serviced
- In assembly language domain, _irq_controller_eoi implements
EOI handling.
- Since triggering options can vary, some common defines for
triggering IRQ_TRIGGER_EDGE, IRQ_TRIGGER_LEVEL, IRQ_POLARITY_HIGH,
IRQ_POLARITY_LOW introduced.
Specific changes made:
- New Kconfig X86_FIXED_IRQ_MAPPING for those interrupt controllers
that have a fixed relationship between IRQ lines and IDT vectors.
- MVIC driver rewritten per the HAS instead of the tortuous methods
used to get it to behave like LOAPIC. We are no longer writing values
to reserved registers. Additional assertions added.
- Some cleanup in the loapic_timer driver to make the MVIC differences
clearer.
- Unused APIs removed, or folded into calling code when used just once.
- MVIC doesn't bother to write a -1 to the intList priority field since
it gets ignored anyway
Issue: ZEP-48
Change-Id: I071a477ea68c36e00c3d0653ce74b3583454154d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Adithya Baglody