Commit Graph

108 Commits

Author SHA1 Message Date
Anas Nashif 909dd7ee05 arduino_101: support booting with original bootloader
To boot zephyr on the Arduino 101 running the original bootloader
which supports DFU, set the following in your application configuration
file:

CONFIG_SS_RESET_VECTOR=0x40034000
CONFIG_PHYS_LOAD_ADDR=0x40010000
CONFIG_VERSION_HEADER=y

Jira: ZEP-219
Change-Id: Ia015a7b6fce888b49ed22c558de992132d4713ea
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-30 13:56:54 -04:00
Anas Nashif 1a1f7fd916 arc: make SRAM/DCCM values configurable
Remove hardcoding and make the values configurable. Also make the
Kconfig variables consistent with other architectures.

Change-Id: I69334002303d4d8abaf7363d9134fd5f46ce4eeb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-25 19:17:03 +00:00
Tomasz Bursztyka fea1c49ba2 gpio: Improve the public API to handle multi callbacks
Many sub-systems might require to set a callback on different pins.
Thus enabling it via changing the API.

It is also possible to retrieve private-data in the callback handler
using CONTAINER_OF() macro (include/misc/util.h).

Former API is still available, and is emulated through the new one.
Using both should not be a problem as it's using new API calls.
However, it's now better to start using the new API.

Change-Id: Id16594202905976cc524775d1cd3592b54a84514
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2016-04-22 22:15:12 -04:00
Alexandre d'Alton f91e55b798 arc: implement stack checking
ARC CPU has stack checking feature that allows to trigger an exception
whenever the stack is incorrectly accessed.
This patch implements the stack_top and stack_base register updates on
context switches, and activates the Stack Checking bit of STATUS32
register when the CPU is in the context of a fiber or task.
As GCC accesses the non-yet allocated stack with frame pointer enabled,
this patch also add the omit-frame-pointer gcc flag in order to work
properly.

Change-Id: Ia9e224085a03bd29d682fb8f51f8e712f2ccb556
Signed-off-by: Alexandre d'Alton <alexandre.dalton@intel.com>
2016-03-29 01:25:49 +00:00
Andrew Boie f0a01163be sys_io: don't allow negative bit offsets
Use of these is the mark of a deranged imagination.

Change-Id: Ib4b5f78cf61c016e333288090b397e9a3e0b8a40
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-03-04 16:26:21 +00:00
Andrew Boie 9df398b0d5 sys_io: introduce bitfield ops
These are guaranteed to work for bitfields that are
larger then 32 bits wide.

Change-Id: I39a641f08a255478fae583947bced762950d12ff
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-03-04 15:12:06 +00:00
Andrew Boie e444825ee3 irq: formalize external zephyr interrupt API
The app-facing interface for configuring interrupts was never
formally defined, instead it was defined separately for each arch
in their respective arch-specific header files. Occasionally these
would go out of sync.

Now there is a single irq.h header which defines this interface.
To avoid runtime overhead, these map to _arch_* implementations of
each that must be defined in headers pulled in by arch/cpu.h.

Change-Id: I69afbeff31fd07f981b5b291f3c427296b00a4ef
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-26 15:53:22 +00:00
Andrew Boie 897ffaeb2c irq: rename irq_connect() to IRQ_CONNECT()
It's not a function and requires all its arguments to be build-time
constants. Make this more obvious to the end user to ease confusion.

Change-Id: I64107cf4d9db9f0e853026ce78e477060570fe6f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:25 -05:00
Peter Mitsis 8e35cc8eb4 build: Add C++ support
Adds C++ support to the build system.

Change-Id: Ice1e57a13598e7a48b0bf3298fc318f4ce012ee6
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:23 -05:00
Peter Mitsis a0e4568760 c++: Add extern "C" { } block to header files
Adds extern "C" { } blocks to header files so that they can be
safely used by C++ source files.

Change-Id: Ia4db0c36a5dac5d3de351184a297d2af0df64532
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:25:22 -05:00
Andrew Boie 2a1ae3f436 ARM: ARC: put sw_isr_table in ROM by default
We can save a great deal of RAM this way, it only needs to be
in RAM if dynamic interrupts are in use.

At some point this config option broke, probably when static
interrupts were introduced into the system.

To induce build (instead of runtime) errors when irq_connect_dynamic()
is used without putting the table in RAM, the dynamic interrupt
functions are now conditionally compiled.

Change-Id: I4860508746fd375d189390163876c59b6c544c9a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:21 -05:00
Andrew Boie d9cfbd5a61 interrupts: new static IRQ API
The interrupt API has been redesigned:

- irq_connect() for dynamic interrupts renamed to irq_connect_dynamic().
  It will be used in situations where the new static irq_connect()
  won't work, i.e. the value of arguments can't be computed at build time
- a new API for static interrupts replaces irq_connect(). it is used
  exactly the same way as its dynamic counterpart. The old static irq
  macros will be removed
- Separate stub assembly files are no longer needed as the stubs are now
  generated inline with irq_connect()

ReST documentation updated for the changed API. Some detail about the
IDT in ROM added, and an oblique reference to the internal-only
_irq_handler_set() API removed; we don't talk about internal APIs in
the official documentation.

Change-Id: I280519993da0e0fe671eb537a876f67de33d3cd4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:17 -05:00
Anas Nashif 275ca60b08 Fixed file description and applied doxygen style
Removed old style file description and documnetation and apply
doxygen synatx.

Change-Id: I3ac9f06d4f574bf3c79c6f6044cec3a7e2f6e4c8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:58 -05:00
Juan Manuel Cruz bc1a79c4c3 irq: removes priority parameter from IRQ_CONFIG macro
Removes the 'priority' parameter from the IRQ_CONFIG macro.
This parameter was not used anymore in any architecture.
The priority is handled in the IRQ_CONNECT macro.
The documentation is updated as well.

Change-Id: I24a293c5e41bd729d5e759113e0c4a8a6a61e0dd
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:24:57 -05:00
Juan Manuel Cruz b51b3da133 quark se arc: irq static initialization support.
Adds static irq support for the Quark SE platform for the ARC core.

New linker sections and sw isr table initialization is needed to support
static IRQ.

Change-Id: I82af98a189f5a156e7f1018f3ecdbfa73ad3e6ef
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:24:56 -05:00
Juan Manuel Cruz a894799c94 arc: static IRQ handling
Adds support for static IRQ handler initialization.

Currently, IRQ_CONNECT and IRQ_CONFIG macros are emulating static
behavior through dynamic initialization.
This commit updates the macros to get real static initialization.
IRQ handlers must be assigned at build time.

Change-Id: Ia07fb25a5e4dae489f84ffcedb28007ee18a3b82
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:24:56 -05:00
Juan Manuel Cruz 4613fc8c74 arc: adapt to standard IRQ_CONNECT_STATIC signature.
IRQ_CONNECT_STATIC takes 6 arguments on other
architectures, but the ARC one had only 5.

Change-Id: I257e8db12582ee2d6f93bba63af9aa597197a53d
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:24:56 -05:00
Andrew Boie 2ec374a8df irq_offload: ARC implementation
Uses the "trap_s" exception to simulate entry into IRQ context;
offloaded functions run on the FIRQ stack.

Change-Id: I310ce42b45aca5dabd1d27e486645d23fa0b118f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:55 -05:00
Benjamin Walsh 02a6baee12 linker: move check for bad initlevels to the end of the sections
This way, it does not fall in the middle of a group, like the RAM group
and as a side-effect potentially move the dot (current address pointer).

Change-Id: Iefbff8bbeadfc740dee61154d7db99b7b7aad6d6
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:55 -05:00
Benjamin Walsh d7fc200a2c arc: abstract bulk of linker script
The linker scripts for the quark_se_ss and generic_arc platforms are the
exact same, so extract the contents in an includable file.

Change-Id: I2cb90a6f819b12db77880228e41ff14c9755d59a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:55 -05:00
Andrew Boie 6406dc6a66 arc: fix static IRQ config macros
These should now work for drivers written for other arches.
Still a hack to do all the IRQ setup at runtime.

Change-Id: I9717f74abef3b9934f9a1c0acbd76d960ed7a3cb
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:48 -05:00
Dmitriy Korovkin f1420515a7 irq: Add flags to IRQ_CONNECT_STATIC() macro and irq_connect() function
Flags allow passing IRQ triggering option for x86 architecture.
Each platform defines flags for a particular device and then
device driver uses them when registers the interrupt handler.

The change in API means that device drivers and sample
applications need to use the new API.

IRQ triggering configuration is now handled by device drivers
by using flags passed to interrupt registering API:
IRQ_CONNECT_STATIC() or irq_connect()

Change-Id: Ibc4312ea2b4032a2efc5b913c6389f780a2a11d1
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-02-05 20:24:44 -05:00
Juan Manuel Cruz 71c289dfbc asm: add asm inline for system set/clear/test bit
This commit adds asm implementation for the methods:
 sys_io_set_bit
 sys_io_clear_bit
 sys_io_test_bit
 sys_io_test_and_set_bit
 sys_io_test_and_clear_bit

Change-Id: I144568e113316fa43d943cdc5457cb17e66839c3
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:41 -05:00
Peter Mitsis 5ff5c62bdc arc: Add paddr_t/vaddr_t
ARC targets now have access to the address types 'paddr_t' and 'vaddr_t'.

Change-Id: I2cccddbdd76771529e4501aaee6cb2a2b640013e
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:41 -05:00
Anas Nashif b269a66e57 doxygen: use @a on parameters
Change-Id: I2ae106d24f17694e9b584a61a6996c6d4d8de059
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:35 -05:00
Dan Kalowsky da67b29569 checkpatch: warning - block_comment_style
Change-Id: I6da43e41f9c6efee577b70513ec368ae3cce0144
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Dan Kalowsky 39063598db checkpatch: error - spacing
Change-Id: Ie6e1c43581dd4b0734625b3a4e59a4ca79619e99
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:24:31 -05:00
Tomasz Bursztyka 86db1b37bd arc: IRQ_CONFIG should not enable the irq
Drivers do it by themselves, usually either in a dedicated irq
configuration function or direcly in their initialization routine.

Change-Id: Id1cca1a1e3e3f36264d99d1d2f2d651d84e0687e
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:29 -05:00
Tomasz Bursztyka 7193a3e007 sys_io: arc: Add sys_in*/sys_out* functions
This functions - reusing _arc_v2_aux_reg_* ones - will ease porting
drivers to ARC architecture hiding arch specific calls under generic
functions. On ARC, auxiliary registers is conceptually comparable to
x86 ports, thus the possibility to bring sys_in/sys_out to access those.

Change-Id: Ic5c0fc41f32ec4ad861dbb58cd8defaf4497bc03
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:29 -05:00
Javier B Perez Hernandez f7fffae8aa Change BSD-3 licenses to Apache 2
Change all the Intel and Wind River code license from BSD-3 to Apache 2.

Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:29 -05:00
Juan Manuel Cruz 69d1939037 arc: add IRQ configuration macro
Change-Id: Ib33142889afc9bef8600147b541770322f094611
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:24:23 -05:00
Juan Manuel Cruz 6525b656cd arc registers: fixes the macros to read arc registers
This commit fixes small errors on the asm implementation of arc
register reading and the built-in functions call.

Change-Id: Iea2df715eaefb25095770971ac03d441311abf16
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:15:36 -05:00
Dirk Brandewie 0a7e4d1b9b Fix arc interrupt configuration
The _ARC_V2_IRQ_VECT_BASE register must be set to the vector table in
flash.

Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Change-Id: Ied5451c98222f545cd669967023aef26c3d8e48e
2016-02-05 20:15:35 -05:00
Tomasz Bursztyka b4e795b78c arc: Fix the sys_io.h operations to work on both registers and addresses
- Finally switched from ldw/stw to ldh/sth, as Benjamin noticed in an
  earlier comment (I was using ARC ISA, and not ARC V2 ISA). So indeed
  ldw/stw are obsolete and equivalent to ldh/std.

- clear, set and test were not working in case of using a memory address
  which would not point to a register: bclr, bset and btst requires
  registers as operands, and cannot deal with pure memory address (i.e.
  something like [rx] is not valid), thus the requirement to load first
  the value pointed by the address into a register, operate on that
  register and storing the result of it into the pointed address.

Change-Id: Ib9c24c0a2c6d2b02e2d08d24f31cbc1981536a7d
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:15:35 -05:00
Tomasz Bursztyka 7ea05b4a09 sys_io: Implement the API for ARC architecture
sys_in/sys_out are not implemented as there is no "ports" in ARC.

Change-Id: Ie72d6274ae1a2b2ca22955a9764e281e7669b973
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:15:31 -05:00
Benjamin Walsh 97f2622f55 arm: rename instances of CortexM
Directory names: CortexM -> cortex_m
Code comments: CortexM -> Cortex-M

Change-Id: If946ed25fac863e0be9dbb6f6c275199402b0b0a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:27 -05:00
Benjamin Walsh 0dcad8331b clarify use of term 'context'
The term 'context' is vague and overloaded. Its usage for 'an execution
context' is now referred as such, in both comments and some APIs' names.
When the execution context can only be a fiber or a task (i.e. not an
ISR), it is referred to as a 'thread', again in comments and everywhere
in the code.

APIs that had their names changed:

  - nano_context_id_t is now nano_thread_id_t
  - context_self_get() is now sys_thread_self_get()
  - context_type_get() is now sys_execution_context_type_get()
  - context_custom_data_set/get() are now
    sys_thread_custom_data_set/get()

The 'context' prefix namespace does not have to be reserved by the
kernel anymore.

The Context Control Structure (CCS) data structure is now the Thread
Control Structure (TCS):

  - struct ccs is now struct tcs
  - tCCS is now tTCS

Change-Id: I7526a76c5b01e7c86333078e2d2e77c9feef5364
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:27 -05:00
Anas Nashif 4ca0b0b96b add missing includes from toolchain
Change-Id: Ic60955df6644d2a15897c6b6c082890b2ccd2371
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:15:26 -05:00
Benjamin Walsh 7710d0e083 ffs: change find_[lsb|msb]_set parameter type to uint32_t
Highlight the fact that find_[lsb|msb]_set operate on a 32-bit word.

Change-Id: I24cee7709ea6497508dbc7f96a7b4d74fa4bc257
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:25 -05:00
Benjamin Walsh 1bab46dca1 ffs: rename find_[first|last]_set to find_[lsb|msb]_set
The new names reflect better what the functions do: they find the first
bit set starting from the least or most significant bit, i.e. they find
the least or most significant bit set, in a 32-bit word.

Change-Id: I6f0ee4b543f6f37c2f08f7067e14e039c92a6f6a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:25 -05:00
Benjamin Walsh 910970ed0f ffs: remove non-inline find_[first|last]_set()
The inline versions are renamed to remove the _inline suffix, and the
non-inline versions are removed from the code base.

Change-Id: Iee2e6adcfb5da1fe0a978a05aa854e10ae82a8b8
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:25 -05:00
Benjamin Walsh 2c5086cc65 irq: remove non-inline irq_lock/unlock
The inline versions are renamed to remove the _inline suffix, and the
non-inline versions are removed from the code base.

Change-Id: I7314b96c42835f15df4c537ec11ab7961d4ee60f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:21 -05:00
Benjamin Walsh c1f9fd888d irq: make utility functions private
irq_handler_set, irq_priority_set and irq_disconnect have been made
private by prepending an underscore to their names:

	irq_handler_set -> irq_handler_set
	irq_priority_set -> irq_priority_set
	irq_disconnect -> irq_disconnect

The prototypes have been removed from header files when possible, and
extern statements used in C code where they were called.

_irq_priority_set() for ARM is still in the header file because
IRQ_CONFIG() relies on it.

Change-Id: I2ad585f8156ff80250f6d9eeca4a249a4477fd9d
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:21 -05:00
Andrew Boie 91156d9c7a arc: standardize ffs function names to match other arches
Change-Id: I4f384960f4c6698ef98ecf3941c30f849832135e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:15:20 -05:00
Anas Nashif f367f071b6 doxygen: add @brief and capitalize
Remove function name from comment and add @brief instead.
Also capitilize first letter.

Change-Id: Ib708b49bf02e5bc89b0066637a55874e659637e0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:33 -05:00
Anas Nashif 1362e3c162 doxygen: RETURNS: -> @return
Previous comment style used RETRURNS:, use @return to comply
with javadoc style.

Change-Id: Ib1dffd92da1d97d60063ec5309b08049828f6661
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:32 -05:00
Anas Nashif ea0d0b220c doxygen: change comment style to match javadoc
The change replaces multiple asterisks to ** at
the beginning of comments and adds a space before
the asterisks at the beginning of lines.

Change-Id: I7656bde3bf4d9a31e38941e43b580520432dabc1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:32 -05:00
Juan Manuel Cruz 308f1586d6 Kbuild: Assembly code extension.
This commit set back .S as the assembly code extension for Kbuild.

Change-Id: Ib0119876bd0bed6617bbfbad2ca6a44e172ab042
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
2016-02-05 20:14:20 -05:00
Allan Stephens 53165a631b Eliminate architecture-specific init.h files
These files now have no useful content.

Change-Id: If5d2df361eb8769ca38c4ae63f68a5681b3ad85b
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:15 -05:00
Allan Stephens 0c3fd0afc2 Relocate declarations of _nano_fiber_swap()
These now appear in the files which declare other non-public
nanokernel APIs.

Change-Id: Iea01d6de44851a08b308004b2c3104c08b020970
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:15 -05:00
Allan Stephens f547a5b7b8 Eliminate cputype.h and its arch-specific derivatives
Since cputype.h no longer has any meaningful content it can be
eliminated, along with the arch-specific files it incorporated.
(This means that the arch-specific nanokernel public APIs are
now referenced only via cpu.h and its derivatives.)

Change-Id: I7f35b6c3c6c092d61c372ff85d73e49414474938
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:15 -05:00
Allan Stephens 03a2abe737 Relocate macros for supporting non-byte addressible architectures
Moves these macros to the main public API include file for each
supported architecture, since the <arch>type.h include file is
to be eliminated.

Change-Id: Ia87b9c0bed1501bcce7f363bd4155f7ef642376a
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:14 -05:00
Peter Mitsis ad74658009 Add __stack tag for aligning task/fiber stacks
The "__stack" tag is to be used to align an array (to STACK_ALIGN) for stack
use by either a fiber or task.

Change-Id: I5828f3ee1b09b0b5ba894ea30689d179de347494
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:13 -05:00
Peter Mitsis 7d2fc8ec22 Add _NANO_ERR_ALLOCATION_FAIL fatal error code
This reason code will be used indicate that the kernel failed to allocate a
critical resource (such as a command packet or a timer packet).

Change-Id: I6d4c3d96fc70b2b8cab4027b1b8e4febf4d6c474
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:13 -05:00
Allan Stephens d1ebe66b84 Eliminate definition of tick event for ARC
Since ARC does not support the microkernel, there is no need to
define any microkernel event symbols for it. (And TICK_EVENT is
an architecture-independent concept anyway ...)

Change-Id: I918a55743f8685ef23b9bb5a8afc67b905ab9766
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:13 -05:00
Allan Stephens 3c0b6f0379 Eliminate definitions of k_memset() and k_memcpy()
These APIs are no longer referenced anywhere.

Change-Id: I56e3410b9fb6bc4eb72bc9299b33f75227916434
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:12 -05:00
Allan Stephens 63720a9af3 Eliminate secure string error handling
This is not required since the secure string library routines
have been removed.

Change-Id: I284a21e4167d9bb6f78354d809c563a4c52f619c
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:12 -05:00
Dan Kalowsky c02dd34277 Renaming include/nanokernel to include/arch
Renaming the directory include/nanokernel to be include/arch, which
better reflects the real nature of the directory and the contents
inside.

Change-Id: I2bc33ebc6715e2f0403227a558279fdf52398ade
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:14:12 -05:00