Commit Graph

64096 Commits

Author SHA1 Message Date
Georgij Cernysiov 15f0afc321 dts: arm: st: h7: cleanup stm32h723 line
Removes label and compatible properties
from the flash section. The properties are
provided by included stm32h723.dtsi.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-11 10:47:43 +02:00
Georgij Cernysiov b23ea08f1e dts: arm: st: h7: correct stm32h723 memory regions
* Corrects SRAM0 size. The `TCM_AXI_SHARED`
  is `000` after reset. That means ITCM
  is shared with SRAM0.
* Adds missing SRAM1,2,4, and ITCM
  regions.
* Adds label and compatible properties
  to the flash section.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-11 10:47:43 +02:00
Georgij Cernysiov d2a792dd39 drivers: clock_control: stm32h7: add stm32h730xx
Add STM32H730xx SoC.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-11 10:47:43 +02:00
Georgij Cernysiov 827343a3da soc: stm32: h7: add support for stm32h730xx
Adds support for STM32H730XX SoC.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-05-11 10:47:43 +02:00
Sylvio Alves 922ae85767 boards: esp32: update Espressif boards documentation
Zephyr SDK toolchain integration requires all ESP32 family
board's documentation updates.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves 20fbaaccc4 boards: esp32: added ignore tags
Espressif boards cannot have ble and wifi
CI build tests due to binary blobs policies.
This removes refered tests.

west.yml: update hal repository to get updates
that allows building using Zephyr's SDK.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves 896809bfcc soc: esp32s2: add _gettimeofday_r workaround
Add reentrant _gettimeofday_ call so that build
won't fail. This is only a workaround for now.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves 9d4d144377 linker: esp32s2: changes to enable newlibc and cpp support
This PR adds missing configuration to enable newlibc
and cpp code to run in ESP32S2 SoC. This isn't enough though.
Toolchain changes are also needed and will come up next.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves 54aa7a9a56 samples: tests: exclude esp32 platform
Remove ESP32 and ESP32S2 from not working samples
and tests. Reason for not working is not enough memory
space in RAM to execute it. This can be worked out as next steps.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves bb077a3d82 soc: esp32c3: linker changes to enable newlibc and cpp
Adds linker changes to enable cpp and newlibc code.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves 3b83e39e16 soc: esp32: decrease region 1 default pool size
Make the available heap for the 128k bank smaller
so that it frees up space for some samples
as pktqueue and smp. In the context of toolchain,
this enables having twister test to pass in those tests
that requires more memory.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves c9f6d18dfc soc: esp32: add Espressif HAL config
Current Espressif porting requires standard include as
part of hal implementation. compiler_flags.cmake checks for
variant name to keep those stdinc in build.
Instead of using variant name as check, use this new CONFIG
to make it clear and to allow having toolchain integrated
in zephyr-sdk package.
stdinc dependency in hal_espressif will be worked out and removed
soon.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves a53e3c1b2b soc: esp32: add toolchain name
Add ESP32 and ESP32S2 toolchain name that is addressed
when integrated with zephyr-sdk.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves b6ab394d14 soc: esp32: add _gettimeofday_r workaround
Add reentrant _gettimeofday_ call so that build
won't fail. This is only a workaround for now.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Sylvio Alves e131679d99 linker: esp32: changes to enable newlibc and cpp support
This PR adds missing configuration to enable newlibc
and cpp code to run in ESP32 SoC. This isn't enough though.
Toolchain changes are also needed and will come up next.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-05-11 10:47:27 +02:00
Daniel DeGrasse 48877f8bdc boards: lpcxpresso11u68: change default console to uart0
UART0 is routed to onboard debugger on LPC11u68 EVK. Change the default
console from UART4 to UART0 to enable output on the onboard debugger
console.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse fed6d6b754 soc: lpc11u6x: enable pin control
Enable pin control for lpc11u6x soc by selecting CONFIG_PINCTRL=y.
At this time no drivers are ported.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse 7e89ce9f19 drivers: serial: enable pin control for lpc11u6x serial driver
Enable pin control api for lpc11u6x serial driver, and remove pinmux api
usage.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse 069280c8a4 drivers: i2c: i2c_lpc11u6x: enable pin control
Enable pin control for lpc11u6x i2c driver, and remove pinmux usage from
board level DTS files.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse 8e07e21424 drivers: clock_control: convert lpc11u6x syscon driver to pinctrl
convert lpc11u6x syscon clock driver to pin control, and remove all
pinmux usage from driver and syscon dts node.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse ff8ba4e0f7 boards: lpcxpresso11u68: add pin control nodes to lpcxpresso11u68
Add pin control node definitions to lpcxpresso11u68 board.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse be7c9a99b2 boards: faze: add pin control nodes to faze board
add pin control definitions and nodes to faze board, which uses an
LPC11u67 SOC.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse 1916fb21dd drivers: pinctrl: update lpc pinctrl driver for lpc11u6x
Update pin control driver for lpc11u6x. This SOC does not have a HAL,
so fsl_clock is not available. It also lacks a slew-rate field in the
IOCON register, so this property must be optional.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse dc4d168952 soc: lpc11u6x: add pin control header
add pin control header to enable pin control support for lpc11u6x

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse 81c209dc2d drivers: gpio_lpc11u6x: use pio nodes to configure pin mux for gpio
switch gpio driver to use pio nodes to configure pin control settings,
and stop using pinmux driver within gpio driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse ea9df42b25 soc: lpc11u6x: add pin control definitions to LPC11u6x soc file
add pin control definitions to LPC11u6x soc file, to handle the lack of
a HAL for this SOC.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse f5b0c4f0d5 dts: lpc11u6x: update lpc dtsi file to include pin control nodes
update lpc11u6x dtsi file to include required DTS nodes to support LPC
pin control

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Daniel DeGrasse f354e00a2c include: dt-bindings: add lpc pin control definitions
add pin control definitions for LPC11u6x to LPU11u6x pinctrl binding.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-10 17:27:44 -05:00
Jordan Yates e5c391fad6 power_domain: gpio: improve logging
Improve the power domain logging by making the log level configurable
and boosting the log level of the messages printed when the domain turns
on and off.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2022-05-10 17:59:56 -04:00
Gerard Marull-Paretas 9516eb49c0 manifest: update HALs ported to <zephyr/...> prefix
The following HALs contain code that makes use of Zephyr headers, so
they have been updated with the <zephyr/...> prefix:

- Altera
- NXP
- STM32
- TI

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-10 17:25:56 -04:00
Mark Holden d04ab82943 coredump: adjust mem_region find in gdbstub
Adjust get_mem_region to not return region when address == end
as there will be nothing to read there. Also, a subsequent region
may have that address as a start address and would be a more appropriate
selection.

Signed-off-by: Mark Holden <mholden@fb.com>
2022-05-10 15:26:31 -04:00
Evgeniy Paltsev 1b1d328101 ARC: define PROPERTY_OUTPUT_FORMAT for all ARC elf formats
Now we define PROPERTY_OUTPUT_FORMAT (which is used for
binutils) only for ARCv3 32 bit. Let's define it for all
ARC elf formats instead of relying on default values.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Evgeniy Paltsev fa5bfb5880 ARC: ARCv3: MWDT: provide required options for building with mwdt
Provide required compiler/assembler options for building with mwdt
toolchain for ARCv3 64 bit.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Evgeniy Paltsev 6014319d35 ARC: boards: mdb_hs6x_smp correct gfrc version in nsim args
Use correct gfrc version in nsim args for mdb_hs6x_smp board.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Evgeniy Paltsev bb6c89bef8 ARC: boards: allow MWDT toolchain for nsim_hs6x and nsim_hs6x_smp
Allow MWDT toolchain and add corresponding compiler options
for nsim_hs6x and nsim_hs6x_smp.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Evgeniy Paltsev d5038c49ba ARC: boards: add nsim_hs5x and nsim_hs5x_smp boards
Add nSIM-based (simulator) boards with
 * nsim_hs5x - single core ARCv3 HS5x 32 bit CPU
 * nsim_hs5x_smp - SMP, two core ARCv3 HS5x 32 bit CPU

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Evgeniy Paltsev 48301dde0f ARC: ARCv3: add HS5x support
Add HS5x CPU support - ARCv3 32bit ISA.

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Evgeniy Paltsev bac430ce1e ARC: asm-compat: add missing parts for ARCv3 32 & 64 bit
Add missing definitions for
 * MWDT toolchain, ARCv3 64 bit
 * MWDT toolchain, ARCv3 32 bit
 * GNU toolchain, ARCv3 32 bit

Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2022-05-10 14:12:25 -04:00
Keith Packard 7955624d1f tests/benchmarks/sys_kernel: Use K_THREAD_STACK_EXTERN in header file
K_THREAD_STACK_DEFINE is not correct in a header file as it may conflict
with K_THREAD_STACK_DEFINE usage in the source file.

Signed-off-by: Keith Packard <keithp@keithp.com>
2022-05-10 13:55:24 -04:00
Esteban Valverde b9313cab1b drivers: counter: Setting I2C as depends in DS3231 config file
When using DS3231 counter, its enablement should depend on I2C

Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
2022-05-10 13:29:47 -04:00
Esteban Valverde 03ec46889b drivers: usb: Adding support to GIC_V1 in dc_dw USB driver
Adding support for the GIC_V1 to the dc_dw USB driver
to be used by Cyclone V SoC FPGA Development Kit

Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
2022-05-10 13:29:47 -04:00
Esteban Valverde 797b6784bb drivers: serial: modify ns16550 to use extended FIFO
Cyclone V SoC FPGA supports 128Byte FIFO for UART communication,
this modification adds a feature to use 128byte FIFO serial UART

Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
2022-05-10 13:29:47 -04:00
Esteban Valverde 3158b1bc26 samples: drivers: adding sample to use Cyclone V SoC FPGA DK LCD display
LCD display is connected to the I2C bus SoC bus in the development kit,
this sample guides the user on how to use the LCD display with I2C commands

Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
2022-05-10 13:29:47 -04:00
Esteban Valverde 74ae6f654e scripts: west_commands: runners: add runner for Cyclone V SoC FPGA DK
Add a runner to "flash" and "debug" Cyclone V SoC FPGA Development Kit
the runner is based on OpenOCD and GDB

Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
2022-05-10 13:29:47 -04:00
Esteban Valverde e3f43161dd boards: arm: add basic Cyclone V SoC FPGA board DK definition
Add a basic board definition for the Cyclone V SoC FPGA.

Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
2022-05-10 13:29:47 -04:00
Esteban Valverde 11ba0802b5 soc: arm: Add Cyclone V SoC FPGA Support
soc: arm: privilege: add Cyclone V SoC FPGA suppport
Add support for the Intel Cyclone V SoC FPGA (arm Cortex-A9).

Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
2022-05-10 13:29:47 -04:00
Emil Gydesen 83c7baf34a Bluetooth: Audio: Add recv_info to audio recv callback
The audio stream receive callback now contains a
recv_info struct, which contain crucial information
such as timestamps and packet validity.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-05-10 18:56:28 +02:00
Emil Gydesen 6191a76f55 Bluetooth: Audio: Add _DIR_ infix to BT_AUDIO_SINK/SOURCE
The values represent an enum, and it makes sense for the
enum values to follow the enum type name, so an
_DIR_ infix was added to the values.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-05-10 18:56:00 +02:00
Emil Gydesen 0a4e62addd Bluetooth: Audio: Remove PAC_TYPE_UNUSED
The PAC_TYPE_UNUSED would be breaking
enum rules, as it is setting and comparing
a value outside the enum range.

Instead we check if the `dir` field has been
set to SINK or SOURCE.

The reason why this still works, is that
we memset the struct unicast_client_pac
causing `dir` to become 0. This still
does not really follow the rules of enums, but
it is the best we can do without adding another
value to determine if a struct unicast_client_pac
is unused or not, without adding another value to
public enum struct.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-05-10 18:56:00 +02:00
Emil Gydesen 19d7420f07 Bluetooth: Audio: Standadize the use of enum bt_audio_dir
Many functions and struct fields had the directory/type
value, but named in different ways and stored in different ways.

This change updates all uses of it to use the same name
and type.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-05-10 18:56:00 +02:00