Not all boards require the various binary formats zephyr generates. So
be selective based on the arch, SoC or board and only geenrate the
binaries actually needed.
Fixes#5009
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
As flash address changes between different boards of same Soc,
it is derived from .dts file instead of hard coding in .dtsi.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Add configuration, pinmux, dts and documentation for the STM32L476G
Discovery board based on the STM32L476VG SoC.
Signed-off-by: Arthur SFEZ <arthur.sfez@gmail.com>
Delete the native timer soft IP driver as we will be reusing
the Altera's HAL drivers for most of the soft IP's.
Add shim driver support for Altera timer system clock soft IP.
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
patch removes the mem.h and marcos used in that file are
moved appropriate board files. As there are boards with
different flash configuration but of same soc, flash and
ram size are moved to dts file instead of dtsi
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
The '=' character was incorrectly getting passed to the JLinkGDBServer
device argument, and caused the server to fail to connect to the target.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Rename the Atmel SAM I2C driver based on TWIHS module to match the
convention:
<driver class>_<SoC family>_<hardware module used by the driver>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
olimexino_stm32 was not getting the flash base address from the Kconfig
variable. Since the board uses DTS that will get set, so we can use the
standard openocd.board.cmake.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Unlike other NXP SoCs currently in Zephyr, the mimxrt1052 has the ARM
MPU rather than the NXP MPU. Start out by enabling it with a simple set
of memory regions for "flash" (ITCM), "ram" (DTCM), and the peripheral
buses. More regions will need to be added when we implement support for
external memories.
Tested with:
- samples/mpu/mpu_stack_guard_test
- tests/kernel/mem_protect/protection
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds support for the NXP MIMXRT1050-EVK board, an entry-level
development board for the new mimxrt1052 Cortex-M7 SoC.
Adds pinmuxing, dts, documentation, and jlink debug support for the new
board. Note that pinmuxing uses the mcux pinmux driver directly rather
than the Zephyr pinmux interface. The mimxrt1052 SoC has complicated
pinmuxing that may require changing the Zephyr pinmux interface to
support, so for now let's use the mcux driver directly.
We are also not yet configuring the external flash, therefore a debugger
is required to load code to the internal sram. The on-board OpenSDA
circuit with jlink firmware is sufficient, and the 'make debug' build
target is supported.
Samples tested include: hello_world, philosophers, synchronization,
basic/blinky, and basic/button.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
the current zephyr sdk now includes openocd configurations for l4
boards, we can now update the boards and docs to reflect this
Signed-off-by: Arthur SFEZ <arthur.sfez@gmail.com>
The old way of constructing FLASH_SCRIPT_ENV_VARS was corrupting the
values that were passed to the flasher. This new method is the
standard way of creating a dictionary/hashmap in CMake and does not
suffer from the same problem.
This fixes
https://github.com/zephyrproject-rtos/zephyr/issues/4844#event-1334599401
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
Move the dts files into the board dir so that board ports can be more
standalone. This will allow us at some point to have board ports
outside of the tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the dts fixup files into the board dir so that board ports can be
more standalone. This will allow us at some point to have board ports
outside of the tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.
Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.
This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.
For users that just want to continue their work with minimal
disruption the following should suffice:
Install CMake 3.8.2+
Port any out-of-tree Makefiles to CMake.
Learn the absolute minimum about the new command line interface:
$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..
$ cd build
$ make
PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
The port will enable Zephyr to run as a guest OS on x86-64 systems. It
comes with a test on QEMU to validate that, thus this new board
introduction. It's "make run" target will issue QEMU with the same
configuration Jailhouse upstream uses for their confis/qemu-x86.c root
cell configuration:
Test configuration for QEMU Q35 VM, 1 GB RAM, 4 cores,
6 MB hypervisor, 60 MB inmates (-4K shared mem device)
This will work provided qemu-system-x86_64 is installed in the system
and a given (qcow2) image with the Jailhouse root cell in it is
provided (any of those will ever ship with Zephyr, it's out of its
scope).
Signed-off-by: Gustavo Lima Chaves <gustavo.lima.chaves@intel.com>
Due to copy paste issue, doc file for board nucleo_f030r8
had wrong file name.
Fix it with correct doc name
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
I2C_1 is enabled in board's DT file but we need to enable
it also in boards default config.
I2C_0 doesn't exist in STM32L475 SOC.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Provide default settings in disco_l475_iot board for following
sensors: LSM6DSL, LIS3MDL, LPS22HB, HTS221.
Sensors are disabled by default.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This should clear up some of the confusion with random number
generators and drivers that obtain entropy from the hardware. Also,
many hardware number generators have limited bandwidth, so it's natural
for their output to be only used for seeding a random number generator.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Add board configuration, dts and pinmux, based on
arm/stm32f4_disco and arm/nucleo_f411re boards.
Error free tests are executed on eval board with the following
sample applications:
- hello_world
- blinky-sample
- button-sample
- console_echo_sample
- console_getchar_sample
Signed-off-by: Jose F. Fernandez <jffernandez@fenix-es.com>
Replacing the default paging scheme from 32-bit paging to
PAE paging in QEMU.
JIRA:ZEP-2511
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
We shouldn't select BOARD_DEPRECATED but set a string with the release
version that the board will get removed in.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replacing the default paging scheme from 32-bit paging to
PAE paging in QEMU.
JIRA:ZEP-2511
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Page Address Extension(PAE) page tables make use of NXE bit in
EFER register.
This patch enables the capability needed to set this bit.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
nucleo_f030r8 fails in CI because applications need
more RAM.
Reduce kernel memory used by stacks and ISR vector table.
Fixes#3923
Signed-off-by: Bobby Noelte <b0661n0e17e@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The original developer no longer has a working board and isn't
interested in maintaining support for the board. Mark the board
deprecated for now and see if anyone wants to pick it up, otherwise will
remove it in a future release.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Added I2C bus (TWI) driver for Atmel SAM MCU family. Only
I2C Master Mode with 7 bit addressing is currently supported.
Tested on Arduino Due board.
Origin: Original
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Match change we made to how I2C is enabled for other stm32 platforms:
Right now we allow for the I2C subsystem to be built without any drivers
enabled that utilize it. When we added support for the new STM32 I2C
driver we forced the I2C driver to be enabled if the I2C subsystem was
enabled. While this makes a reasonable amount of sense, it breaks
current assumptions for various testcases that we need to cleanup.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The IAMCU variant does not need to be the default, this calling
convention was to support the discontinued Quark platforms.
qemu_x86 and qemu_x86_nommu now are set as default.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This will run all tests with the memory management unit disabled.
This means no hardware-based stack protection or user threads.
qemu_x86_iamcu now runs with all MMU features enabled.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This patch adds support for TI Simplelink MSP-EXP432P401R-LAUNCHXL
development board based on Cortex M4 family
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Set Vendor and Product ID originally present in the firmware.
Implemented USB function is the same: CDC ACM serial port.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Clean up & rework JTAG documentation for ESP-32 boards to provide full
commands and clarify gotchas.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This requires openocd version 0.10 or later.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@linaro.org>
The EFM32 Wonder Gecko Starter Kit contains sensors and
peripherals demonstarting the usage of the EFM32WG MCU
family. This patch add basic support for this board.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Supports both master and slave mode, standard and fast modes,
configurable timeouts, and a few other tunable settings.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
ESP-IDF is in constant development and it's likely that files Zephyr
depends on will be moved, removed, or renamed. Make a note that an
older version of ESP-IDF should be used instead.
Closes#1538.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Instead of having a board-specific config for this adc test, enable the
required battery-sense circuit by default at the board level when the
adc driver is enabled.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Some our Zephyr tools don't like seeing UTF-8 characters, as reported in
issue #4131) so a quick scan and replace for UTF-8 characters in .rst,
.h, and Kconfig files using "file --mime-encoding" (excluding the /ext
folders) finds these files to tweak.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Move all QEMU related defines to the boards and cleanup xtensa platforms
which were marked to be QEMU capable by mistake.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
xtensa uses more stack than other arches, enable the sentinel since we
don't currently have HW-assisted stack checking on this arch.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Default configuration for USART1 (Console output) on board
stm32f3_disco was set on PA9/PA10, which matches Rev-A/B
configuration. Though, on more recent configuration of the
board (Rev-C onward). USART1 is mapped to PC4/PC5.
This configuration has the benefit to support VCP, hence it
is chosen to be set by default.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Enable BlueNRJ chip on disco_l475_iot1 board.
Communication with SoC, is done over SPI(3). Hence this
commit enables SPI3 on SoC and configure BT_SPI IRQ,
RESET and CS pins.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add board configuration, dts and pinmux based on both
stm32f469i_disco board and nucleo_f412zg board
Signed-off-by: Massimiliano Cialdi <massimiliano.cialdi@powersoft.it>
Move all STM32 based board pinmux files into the board dirs so we are
consistent across all the STM32 platforms/boards.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Added some clarification on flashing instructions for CC3220SF, in
support of customer issue.
Jira: ZEP-2581
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The zedboard_pulpino has a small amount of flash so we should have that
in the yaml for any tests thats might filter on code size footprint.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
patch add device tree support for develoement board of
quark_se_c1000. Previously pushed patch was flashing binary
at wrong address because of which UART was not working
Jira:ZEP-2459
test
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
BLE is the only networking interface on 96b_carbon, so if
CONFIG_NETWORKING is set, automatically use 6lowpan/BLE link
layer. This will allow to make networking apps work "out of the
box" on 96b_carbon, similar to e.g. qemu_x86 (which automatically
uses SLIP) or frdm_k64f (which automatically uses Ethernet).
This also enables NET_L2_BT_ZEP1656, because most 6LoWPAN/BLE samples
in Zephyr currently use that option, and it is required to achieve
working 6LoWPAN/BLE with Linux kernels currently widely accessible
to the end users. E.g. the latest Ubuntu LTS release, 16.04, ships
with 4.4 kernel, and can be upgraded with a special effort to HWE
kernel which is currently at 4.10. NET_L2_BT_ZEP1656 is needed for
both these kernels.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
This reverts commit e1382cc7d6.
Due to restrictive simplelink host driver source licensing.
This also reverts commits based on the simplelink wifi host
driver:
Revert "ext: simplelink: host driver: depend on multithreading"
commit: 4d912b004b
Revert "ext: simplelink: Enable SimpleLink to use Zephyr __errno"
commit: 4e022f7b28
Revert "ext: simplelink: Add SimpleLink DPL porting layer to Zephyr"
commit: 4bc51e67d4
Revert "ext: simplelink: Enable build of the SimpleLink host driver."
commit: 2d2615a49a
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
* add arc mpu driver
* modify the corresponding kconfig and kbuild
* currently only em_starterkit 2.2's em7d configuration
has mpu feature (mpu version 2)
* as the minimum region size of arc mpu version 2 is 2048 bytes and
region size should be power of 2, the stack size of threads
(including main thread and idle thread) should be at least
2048 bytes and power of 2
* for mpu stack guard feature, a stack guard region of 2048 bytes
is generated. This brings more memory footprint
* For arc mpu version 3, the minimum region size is 32 bytes.
* the codes are tested by the mpu_stack_guard_test and stackprot
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add cross-referenced information on the 96b_carbon and
96b_carbon_nrf51 pages which disambiguates between the two "boards".
Also describe how to flash 96b_carbon_nrf51 with
samples/bluetooth/hci_spi and 96b_carbon with samples/bluetooth/ipsp
to support a Bluetooth HCI stack on 96Boards Carbon (the physical
board).
While we're here, make the documentation page for 96b_carbon match the
format in doc/templates/board.tmpl.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
On 96Boards Carbon, Bluetooth is provided by a secondary nRF51 chip
connected to SPI_1, so enable this peripheral and its driver when BT
is selected.
Similarly, provide BT_SPI_* configs to integrate with the BT HCI SPI
driver. The files these config values apply to only get built when
CONFIG_BT=y, but this configuration can't be handled in the "if BT"
section in 96b_carbon's Kconfig.defconfig. This is because BT_SPI is
a choice value, and thus doesn't support a default setting.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Per ZEP-1958, Phase 2 of adding CC3220sf LaunchXL support,
was to "deprecate the CC3200 launchxl support in Zephyr
(redundant to the CC3220)."
Effectively, the CC3220 SOC replaces the CC3200.
This patch removes the following:
* the imported CC3200 SDK
* CC3200 SOC, board, DTS files.
* adjusts other files where cc3200 was mentioned.
Also, it fixes explicit references to CC3200 in generic
CC32xx driver files.
Jira: ZEP-1958
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Rename the BT_CONTROLLER prefix used in all of the Kconfig variables
related to the Bluetooth controller to BT_CTLR.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Some boards had HAS_DTS in the defconfig which is dropped if the Kconfig
variable does not have a prompt.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The SimpleLink host driver comes with its own definition of
__errno, which conflicts with Zephyr's definition, but has
a mechanism to enable use of the porting OS's __errno variable.
This patch enables SimpleLink to use Zephyr's __errno
via the DPL porting layer.
Jira: ZEP-1958
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
This patch enables and builds the SimpleLink host driver
for Zephyr introduced in a previous patch.
Jira: ZEP-1958
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The ESP-WROOM-32 board exits the bootloader at 40 MHz, not 160 MHz as
suggested by documentation. The CCOUNT special register works as
advertised, but not at the expected rate. This was verified by
timestamping (at the host) the output of a dependency-free loop that
looks like:
int key = irq_lock();
while(1) {
u32_t i, count;
volatile int dummy;
for(i = 0; i < 5000000; i++) {
dummy++;
}
__asm__ volatile ("rsr.ccount %0" : "=a"(count));
printk("%d\n", count);
}
The SoC has a fairly robust set of possible CPU clocking modes, but we
don't have a driver for that yet. Until we do, set the single
configured CPU frequency to the one we get at runtime.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Now that we have an mcux shim driver, remove the old k64-specific
driver. Also remove include/drivers/k20_sim.h, since the old
k64-specific driver was the only thing left using it.
Jira: ZEP-2025
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
If the ftm driver is enabled, use an instance routed to the Arduino
header and configure the pinmux accordingly. Unlike the hexiwear_k64,
the pins routed to the RGB led cannot be muxed as ftm channels.
Jira: ZEP-2025
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
If the ftm driver is enabled, use the instance routed to the RGB led and
configure the pinmuxes as ftm channels instead of gpios.
Jira: ZEP-2025
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The Xtensa port was the only one remaining to be converted to the new
way of connecting interrupts in Zephyr. Some things are still
unconverted, mainly the exception table, and this will be performed
another time.
Of note: _irq_priority_set() isn't called on _ARCH_IRQ_CONNECT(), since
IRQs can't change priority on Xtensa: while the architecture has the
concept of interrupt priority levels, each line has a fixed level and
can't be changed.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
The random number generator from ESP32 uses noise from Wi-Fi and
Bluetooth radios. If these are off, a pseudo-random number is
generated instead; this is currently the case, but even though it's a
black box, it's arguably better than returning a timestamp as a
pseudo-random number generator.
According to the ESP32 Technical Reference manual, the RNG passed the
Dieharder Random Number Test suite (version 3.31.1)[1], but nothing has
been said about the quality of the PRNG.
The RNG register is read directly; no effort is made to use its
contents to feed an entropy pool in a way that's similar to /dev/random
on POSIX systems, as no such subsystem exists on Zephyr at the moment.
[1] http://webhome.phy.duke.edu/~rgb/General/dieharder.php
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This provides basic GPIO support, with interrupts, and the ability to
read and write to ports on a pin-by-pin basis.
Jira: ZEP-2286
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This implements a driver for the pin multiplexer as present in the ESP32
SoCs.
All APIs are supported.
Jira: ZEP-2297
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
- board name olimex_stm32_p405
- CPU STM32F405RGT6 Cortex M4
- LED/BUTTON support
- Console on USART2 with 8n1 115200 baud
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
The API name space for Bluetooth is bt_* and BT_* so it makes sense to
align the Kconfig name space with this. The additional benefit is that
this also makes the names shorter. It is also in line with what Linux
uses for Bluetooth Kconfig entries.
Some Bluetooth-related Networking Kconfig defines are renamed as well
in order to be consistent, such as NET_L2_BLUETOOTH.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
ReST defines interpreted text roles where text enclosed by single quotes
can be "intrepreted", for example :ref:`some name` becomes a link to
a label anywhere in the doc set named "some name", :c:func:`funcname()`
becomes a link to the API documentation for "funcname", and
:option:`CONFIG_NAME` becomes a link to, in our case, the documentation
for the generated Kconfig option.
This patch fixes uses of `some name` (without a role) by either adding
an explicit role, or changing to ``some name``, which indicates inline
code block formatting (most likely what was intended).
This is a precursor to changing the default behavior of interpreted
text to treat `some name` as :any:`some name` (as configured in
doc/conf.py), which would attempt to create a link to any available
definition of "some name".
We may not change this default role behavior, but it becomes an option
after the fixes in this patch. In any case, this patch fixes incorrect
uses of single-quoted text (possibly introduced because GitHub's
markdown language uses single-quoted text for inline code formatting).
Jira: ZEP-2414
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This change fixes the prescaler values in the defconfig. The prescaler
values shown in the technical reference manual (STM32F407xx, p.19)
differ from those in the defconfig which results in wrong timer delays.
This patch corrects those values according to the manual. I tested it by
toggling a GPIO pin with different timer frequencies and run the
sanitycheck.
Signed-off-by: Andreas Kölbl <andreas.koelbl@st.oth-regensburg.de>
The previously used default value of 4 for the PPL_Q_DIVISOR results
in a frequency of 84MHz which is outside the acceptable range
of 47.88MHz to 48.12MHz.
The new value of 7 results in exactly 48MHz.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
The default boolean setting for QEMU_TARGET was incorrectly placed in
the prompt field, so it was showing up as a config option in 'make
menuconfig' when it should be hidden.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The documentation details how to install and configure all the
pre-requisites to build Zephyr for the ESP32 SoC, including using the
vendor SDK and toolchain, the flashing tool, and how to use JTAG.
Jira: ZEP-2109
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This will allow checking if we are building for QEMU globally, without
having to know the exact architecture and board name.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now that we generate BLUETOOTH_UART_ON_DEV_NAME, UART_PIPE_ON_DEV_NAME,
and BLUETOOTH_MONITOR_ON_DEV_NAME Kconfig defines for dts enabled
platforms add those into the appropriate dts files and remove from the
various board/Kconfig.defconfig files.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Since HAS_DTS is always defined for arduino_101 the board specific
Kconfig bits associated with !HAS_DTS are never used, so lets remove
them.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch fix problems in nrf52_vbluno52 document:
+ Delete `Segger RTT` from supported features
+ Add `5.0` version to Bluetooth Low Energy feature
Signed-off-by: Nam Do <robotden@gmail.com>
This will cause sanitycheck runs to finish more quickly
instead of sitting there waiting on a timeout. We already
do this with the Xtensa simulator.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Adds a new variable to define which OpenSDA firmware is on the board,
and selects the default flash/debug scripts accordingly.
Sets the default to jlink since the flashing and debugging examples
in the board document were written to use jlink.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new variable to define which OpenSDA firmware is on the board,
and selects the default flash/debug scripts accordingly.
Sets the default to daplink since the flashing and debugging examples in
the board document were written to use pyocd.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new variable to define which OpenSDA firmware is on the board,
and selects the default flash/debug scripts accordingly.
Sets the default to daplink since the flashing and debugging examples in
the board document were written to use pyocd.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new variable to define which OpenSDA firmware is on the board,
and selects the default flash/debug scripts accordingly.
Sets the default to daplink since the flashing and debugging examples in
the board document were written to use pyocd.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new variable to define which OpenSDA firmware is on the board,
and selects the default flash/debug scripts accordingly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds the pyocd target name for the frdm_kw41z board, but does not change
the default flash/debug scripts from jlink to pyocd. pyocd has not yet
tagged a release with kw41z support, so to use it one must build pyocd
from source based on the current master branch (f21d43d).
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Update the MCUX I2C driver and related platforms to get their I2C
information from the device tree. We also updated a few of the sensor
drivers found on the FRDM & Hexiwear boards to get their I2C bus name
from the device tree instead of directly from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Enables a usable adc driver instance based on the board design. No
additional pinmux configuration is necessary because a dedicated adc pin
is routed to the board's battery sense circuit. Updates the board
documentation to reflect that the board now supports an adc driver.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enables a usable adc driver instance based on the board design and
configures the pinmux to enable the SoC's PTB1 pin, which is routed to
the board's battery sense circuit. Updates the board documentation to
reflect that the board now supports an adc driver.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enables a usable adc driver instance based on the board design and
configures the pinmux to enable the SoC's PTB10 pin, which is routed to
the Arduino header A2 pin. Updates the board documentation to reflect
that the board now supports an adc driver.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enables a usable adc driver instance based on the board design and
configures the pinmux to enable one adc channel on the SoC's PTB2 pin,
which is routed to the Arduino header A2 pin. Updates the board
documentation to reflect that the board now supports an adc driver.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enables a usable adc driver instance based on the board design and
configures the pinmux to enable one adc channel on the SoC's PTB2 pin,
which is routed to the Arduino header A2 pin. Updates the board
documentation to reflect that the board now supports an adc driver.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
patch uses chosen property zephyr,bt-uart, zephyr,uart-pipe
and zephyr,bt-mon-uart to determine the uart instance to be
used for bluetooth,uart_pipe and bluetooth_monitor and generate
appropriate configs.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
+ The VBLUno52 board
nRF52832 ARM Cortex-M4F processor
Bluetooth Low Energy 5.0
DAPLink interface
UNO pinout
4 power
+ The following samples were tested:
hello_world
basic/button
basic/blinky
bluetooth/peripheral_hr
bluetooth/beacon
Signed-off-by: Nam Do <robotden@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We can use the chosen property "zephyr,console" to determine what uart
should be used as the console and find its name to generate a define for
CONFIG_UART_CONSOLE_ON_DEV_NAME.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch add I2C to supported features and I2C section for
96b_carbon, nucleof401re and olimexino_stm32
It also adds serial port section to 96b_carbon and olimexino_stm32
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
We have lots of RAM, this helps catch bugs.
Enable XIP as well, this used to be turned on but was
shut off for some reason.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Previously we were instantiating QEMU with 32MB of RAM but
only enabling a small fraction of it.
Now we boot with 8MB of ram. We ignore the first 4K so we can
make that an unmapped paged to catch NULL pointer dereferences.
If XIP is enabled, the "ROM" region will be the first half of
memory, the "RAM" region the latter.
Move the IDT_LIST and MMU_LIST regions elsewhere so they don't
overlap the new memory arrangement.
Use !XIP to fix a problem where CONFIG_RAM_SIZE was set incorrectly
for XIP case.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Configure I2C using DT for the following STM32 boards:
disco_l475_iot1
nucleo_f401re
96b_carbon
olimexino_stm32
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The stm32f3_disco has 40k of ram and we have some tests that require
more than that so we need to specify it in the yaml.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This should be a default option for this board which would allow us to
remove it from many sample configurations that can be then used for
other boards.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Right now we allow for the I2C subsystem to be built without any drivers
enabled that utilize it. When we added support for the new STM32 I2C
driver we forced the I2C driver to be enabled if the I2C subsystem was
enabled. While this makes a reasonable amount of sense, it breaks
current assumptions for various testcases that we need to cleanup.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
+ VBLUno51 board
nRF51822
Bluetooth Low Energy
DAPLink interface
UNO pinout
4 power
+ Wiki: https://vngiotlab.github.io/vbluno/
+ The following samples were tested:
hello_world
basic/button
basic/blinky
bluetooth/peripheral_hr
bluetooth/beacon
Signed-off-by: Nam Do <robotden@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Sidebar navigation for supported boards is wonky: opens to show
all boards (making for lots of scrolling to see the sidebar) and
sidebar items aren't always clickable (as explained in the JIRA
issue).
Fix is to not use multiple toctree directives in boards.rst and
create intermediate architecture-specific supported board docs.
JIRA: INF-132
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Board port was done before the yaml transition, so was missing a
cc2650_sensortag.yaml. As such when we build all the test we get a few
build errors that we also fixed up.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add configuration, documentation, pinmux, fixup and dts support for
STM32F103x8 based Minimum System Development board.
Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
Allow to use an external debug adapter such as J-Link or ULINK
connected to a 20-pin JTAG header to flash the image. SWD is
the actual protocol used by the debug interface.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
As there are multiple ways to flash or debug (pyOCD or openOCD) allow
the user to override the default.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
patch adds necessary files and does the modification
to the existing files to add device support for
arduino_101 board.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Add board metadata to be consumed by the sanitycheck script to provide
better matching with testcases and to test based on features declated in
the board files.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This flashes Zephyr at 0x1000: that's where the first stage bootloader,
part of the ESP32 ROM, expects to find an "image header".
The second-stage bootloader, part of ESP-IDF, isn't used by the Zephyr
port. However, the bootloader can be used if desired; please refer to
the ESP-IDF documentation on how to set up partitions tables and use
the bootloader.
The following environment variables will affect the ESP32 flashing
process:
Variable Default value
ESP_DEVICE /dev/ttyUSB0
ESP_BAUD_RATE 921600
ESP_FLASH_SIZE detect
ESP_FLASH_FREQ 40m
ESP_FLASH_MODE dio
ESP_TOOL espidf
It's impossible to determine which serial port the ESP32 board is
connected to, as it uses a generic RS232-USB converter. The default of
/dev/ttyUSB0 is provided as that's often the assigned name on a Linux
machine without any other such converters.
The baud rate of 921600bps is recommended. If experiencing issues when
flashing, try halving the value a few times (460800, 230400, 115200,
etc). It might be necessary to change the flash frequency or the flash
mode; please refer to the esptool documentation for guidance on these
settings.
If ${ESP_TOOL} is set to "espidf", the esptool.py script found within
ESP-IDF will be used. Otherwise, this variable is handled as a path to
the tool.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
The first stage bootloader, part of the ESP32 ROM, already sets up
a stack that's sufficient to execute C programs. So, instead of
implementing __stack() in assembly, do it in C to simplify things
slightly.
This ESP32-specific initialization will perform the following:
- Disable the watchdog timer that's enabled by the bootloader
- Move exception handlers to IRAM
- Disable normal interrupts
- Disable the second CPU
- Zero out the BSS segment
Things that might be performed in the future include setting up the
CPU frequency, memory protection regions, and enabling the flash
cache.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Unconditionally use CONFIG_SIMULATOR_XTENSA to determine if XT_SIMULATOR
or XT_BOARD should be defined.
If CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, also define XT_CLOCK_FREQ. This
isn't ideal as the clock frequency might be changed in runtime and this
effectively makes it a constant.
Until we can control the clock frequency in runtime, this will suffice.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This is a minimal driver enabling console output during the port
bringup. While the driver works, only one of the three UART devices
are supported, and there isn't any way to change any parameters or
use interrupts. This will most likely be superceded by a proper
driver after the port has matured.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
A couple of docs were created in previous PRs with board support
information common to a few boards. Move these to a new section
for "Board Support Tools". (I debated about hiding them completely
but decided it would still be useful to have these tool docs appear
in the table of contents, just not embedded with the supported boards
docs.)
Moved these board tools docs over to the doc/ folder and out of
boards/ and removed these pages from the navigation index.
JIRA: ZEP-2285
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
- board name olimex_stm32_e407
- CPU STM32F407ZGT6 Cortex M4
- LED/BUTTON support
- Console on USART1 with 8n1 115200 baud
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Some files have moved from their original location, or are no longer
available. For the mbedtls samples, tweak the link to point to a page
where links for current and previous downloads can be found.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Board documentaion for altera_max10 referenced the nios2-configure-sof
tool in arch/nios2/soc/nios2f-zephyr/cpu/ when this tool is actually
part of the Altera Quartus SDK (the .sof FPGA configuration files are
in this folder)
jira: ZEP-2006
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
The wiki directions indicate that this script should be used,
and openocd.sh doesn't even work. Switch to pyocd.sh by default.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add necessary board files, pinmux and device tree in order to have a
usable debug console.
Origin: Original
Change-Id: I43a9d278c3f2c936a714263626722f630367b663
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Following migration of stm32f1xx series clock control driver to
STM32Cube LL API, cleanup stm32 code base in order to take into
account that this is the only clock driver available for stm32
family.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following introduction of stm32cube LL based clock control driver
for stm32f1 series, update stm32f1xx based boards to support new
driver settings
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Enable the MPU on the Nucleo STM32F413 board.
Change-Id: I0f256a4c7231f9d3844e67a94d989c8d93b60e58
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
CONFIG_CLOCK_VDD_VOLTAGE does not exist. It was introduced by accident
with commit 614db02cc6 ("stm32f4: Add STM32F413 Nucleo board"), so
remove it!
Change-Id: I3363a92627708bf5ffb080c2238fc84c71caa8d9
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Atmel SAM3X series has been recently converted to use ASF
and should now use common SAM family drivers. The atmel_sam3
serial driver will be removed in the future.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Increase to 1024 to get more tests and sample running on this device
with only 8K of SRAM.
Change thread stack size in the mslab test to make it fit into this
board.
Jira: ZEP-2079
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We now have generic ARM M4 MPU support added to Zephyr.
Let's enable it for use with Nordic nRF52 chips.
Memory Layout was generated from Section 8.3 "Memory
Map" of nRF52 Product Specifications (for both nRF52832
and nRF52840):
0x00000000: Flash
0x10000000: Factory Information Config Registers
0x10001000: User Information Config Registers
0x20000000: SRAM
0x40000000: APB Peripherals
0x50000000: AHB Peripherals
0xE0000000: ARM M4 Private Peripheral Registers
NOT Configured:
0x60000000: External RAM
0x80000000: External RAM
0xA0000000: External Device
0xC0000000: External Device
NOTE: More work will be needed for future Nordic MWU (Memory
Watching Unit) support.
Signed-off-by: Michael Scott <michael.scott@linaro.org>
Neither ASF nor CMSIS provide defines that can be processed by
the assembler. Exclude those from soc.h. Before this was done
incorrectly in board.h file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Removed CONFIG_HAS_DTS from the stm32f4_disco_defconfig &
stm32l496g_disco_defconfig files as its automatically selected for all
ARM SoCs at this point.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We now get the baud rate for the serial port from the device tree so we
don't need to be setting it in the defconfig.
The baud rate changed from 38400 to 115200 when we introduced the device
tree for MPS2. The default baud rate was based on matching mbed, but we
use 115200 to match the standard default we have for most boards now.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch converts Atmel sam3x MCU series to use register
header files from Atmel Software Framework (ASF) library.
By using ASF different Atmel SAM MCU series can use common
device drivers.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Now that NXP boards support 'make flash' and 'make debug' via pyOCD and
Segger J-Link, update all the NXP board docs accordingly. Adds a new
generalized OpenSDA document so certain details don't have to be
repeated for every OpenSDA board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Anas Nashif