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dts: arm: nxp: add Lpi2c support for S32Z27x 

add Lpi2c nodes to S32Z27x devices

Signed-off-by: Tu Nguyen Van <tu.nguyenvan@nxp.com>
This commit is contained in:
Tu Nguyen Van 2024-08-20 10:43:29 +07:00 committed by Carles Cufí
parent 826235c5c6
commit f3b74d8ea8
2 changed files with 23 additions and 0 deletions
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22
dts/arm/nxp/nxp_s32z27x_r52.dtsi
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@ -8,6 +8,7 @@
#include <arm/armv8-r.dtsi>
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
#include <zephyr/dt-bindings/clock/nxp_s32z2_clock.h>
#include <zephyr/dt-bindings/i2c/i2c.h>
/ {
cpus {
@ -1094,5 +1095,26 @@
status = "disabled";
};
lpi2c1: i2c@409d0000 {
compatible = "nxp,imx-lpi2c";
reg = <0x409d0000 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
clocks = <&clock NXP_S32_P1_REG_INTF_CLK>;
clock-frequency = <I2C_BITRATE_STANDARD>;
status = "disabled";
};
lpi2c2: i2c@421d0000 {
compatible = "nxp,imx-lpi2c";
reg = <0x421d0000 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
clocks = <&clock NXP_S32_P4_REG_INTF_CLK>;
clock-frequency = <I2C_BITRATE_STANDARD>;
status = "disabled";
};
};
};

1
soc/nxp/s32/s32ze/Kconfig
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@ -17,6 +17,7 @@ config SOC_SERIES_S32ZE
select HAS_MCUX
select HAS_MCUX_PIT
select HAS_MCUX_FLEXCAN
select HAS_MCUX_LPI2C
if SOC_SERIES_S32ZE