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dts: arm: st: wb0: add I2C and SPI nodes 

Add I2C and SPI Device Tree nodes in SoC DTSI files to allow usage of these
peripherals.

Note that the SPI driver requires no modification to be functional on WB0.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
This commit is contained in:
Mathieu Choplain 2024-10-15 11:40:53 +02:00 committed by Anas Nashif
parent 6fd1a19868
commit a6ffdd3e47
2 changed files with 54 additions and 0 deletions
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22
dts/arm/st/wb0/stm32wb0.dtsi
View File

@ -195,6 +195,28 @@
interrupts = <9 0>;
status = "disabled";
};
i2c1: i2c@41000000 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x41000000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 (1 << 21)>;
interrupts = <3 0>;
interrupt-names = "combined";
status = "disabled";
};
spi3: spi@41007000 {
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x41007000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 (1 << 14)>;
interrupts = <7 0>;
status = "disabled";
};
};
};

32
dts/arm/st/wb0/stm32wb07.dtsi
View File

@ -15,5 +15,37 @@
reg = <0x10040000 DT_SIZE_K(256)>;
};
};
i2c2: i2c@41001000 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x41001000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 (1 << 23)>;
interrupts = <4 0>;
interrupt-names = "combined";
status = "disabled";
};
spi1: spi@41002000 {
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x41002000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 (1 << 0)>;
interrupts = <5 0>;
status = "disabled";
};
spi2: spi@41003000 {
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x41003000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 (1 << 12)>;
interrupts = <6 0>;
status = "disabled";
};
};
};