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zephyr/drivers/adc/Kconfig.mcux

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kconfig: adc: Extract platform specific configs to separate files. It increases readability and order. Signed-off-by: Michał Kruszewski <michal.kruszewski@nordicsemi.no>
2017-08-30 18:25:49 +08:00
# Kconfig - ADC configuration options
#
# Copyright (c) 2015 Intel Corporation
#
# SPDX-License-Identifier: Apache-2.0
#
drivers: adc: mcux_adc12: add driver for the NXP ADC12 module Add MCUX driver shim for the NXP Kinetis 12-bit ADC module (ADC12). Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-05-16 14:17:18 +08:00
config ADC_MCUX_ADC12
bool "MCUX ADC12 driver"
depends on HAS_MCUX_ADC12
help
Enable the MCUX ADC12 driver.
kconfig: adc: Extract platform specific configs to separate files. It increases readability and order. Signed-off-by: Michał Kruszewski <michal.kruszewski@nordicsemi.no>
2017-08-30 18:25:49 +08:00
config ADC_MCUX_ADC16
bool "MCUX ADC16 driver"
mcux: nxp_kinetis: Move HAS_ADC16 config to ext SoCs outside the Kinetis family can have the ADC16 module, so move the HAS_ADC16 config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-08-26 00:15:49 +08:00
depends on HAS_MCUX_ADC16
kconfig: adc: Extract platform specific configs to separate files. It increases readability and order. Signed-off-by: Michał Kruszewski <michal.kruszewski@nordicsemi.no>
2017-08-30 18:25:49 +08:00
help
Enable the MCUX ADC16 driver.
drivers: adc_mcux: improve initialization of the ADC Improve initialization of the ADC. After initialization with the default values, the clock source of the ADC is asynchronous clock (ADACK) and clock divide ratio is 8. The minimum conversion clock frequency is 1MHz. Add clock divider selection and set default divide ratio to 1. That sets the conversion clock frequency to approximately 5MHz. Default configuration for the voltage reference is set to external pins V_REFH and V_REFL. Depending on the MCU configuration V_REFL may be connected to ground and V_REFH to VREF_OUT. Since Voltage Reference block is not supported, the ADC does not work properly on FRDM-KW41Z. Add voltage reference selection to fix it. Enable self-calibration function as recommeded in Reference Manual. Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2018-09-28 20:18:03 +08:00
if ADC_MCUX_ADC16
choice
prompt "Clock Divide Selection"
default ADC_MCUX_ADC16_CLK_DIV_RATIO_1
config ADC_MCUX_ADC16_CLK_DIV_RATIO_1
bool "Divide ratio is 1"
config ADC_MCUX_ADC16_CLK_DIV_RATIO_2
bool "Divide ratio is 2"
config ADC_MCUX_ADC16_CLK_DIV_RATIO_4
bool "Divide ratio is 4"
config ADC_MCUX_ADC16_CLK_DIV_RATIO_8
bool "Divide ratio is 8"
endchoice
choice
prompt "Voltage Reference Selection"
default ADC_MCUX_ADC16_VREF_DEFAULT
config ADC_MCUX_ADC16_VREF_DEFAULT
bool "Default voltage reference pair V_REFH and V_REFL"
config ADC_MCUX_ADC16_VREF_ALTERNATE
bool "Alternate reference pair"
endchoice
endif # ADC_MCUX_ADC16