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ARC: Mention ARC EM family instead of EM4 template ARC EM4 is just a baseline configuration of ARC EM family of CPU cores. But with addition of more featuers like caches, DSP extensions etc we're effectively getting EM6, EM5D etc templates. So to not confuse users let's talk about families of ARC cores as that's what makes sense together with extra features but not templates itself. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-06-04 13:37:31 +08:00
# ARC options
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
#
ARC: Mention ARC EM family instead of EM4 template ARC EM4 is just a baseline configuration of ARC EM family of CPU cores. But with addition of more featuers like caches, DSP extensions etc we're effectively getting EM6, EM5D etc templates. So to not confuse users let's talk about families of ARC cores as that's what makes sense together with extra features but not templates itself. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-06-04 13:37:31 +08:00
# Copyright (c) 2014, 2019 Wind River Systems, Inc.
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
#
license: Replace Apache boilerplate with SPDX tag Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 09:01:01 +08:00
# SPDX-License-Identifier: Apache-2.0
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
#
arch: move kconfig SoC selection to top level The SoC selections for each architecture are moved to the top level in menuconfig and xconfig. This makes it more intuitive to select architecture -> SoC -> then board, avoiding an additional trip to go into the architecture menu to select SoC. Change-Id: I57a78a09adfc4bb12423915b6ad14ceb74381a2b Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-16 01:24:36 +08:00
menu "ARC Options"
kconfig: define architecture as a kconfig variable Do not depend on environment variables and use a kconfig variable for defining the architecture. In addition, remove the X86_32 variable, it just duplicates X86 for not good reason, at least until start supporting MCUs with 64bit. Change-Id: Ia001db81ed007e6a43f34506fed9be1345b88a4b Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-10-09 18:20:52 +08:00
depends on ARC
Sync arch/<arch>/Kconfig files Put architecture option and ARCH_DEFCONFIG on the top and simplify default options for the architectures. Change-Id: I4cae73f3e9ec24913e201269ec6dc8eddc2fd7c1 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-08-24 01:08:06 +08:00
kconfig: define architecture as a kconfig variable Do not depend on environment variables and use a kconfig variable for defining the architecture. In addition, remove the X86_32 variable, it just duplicates X86 for not good reason, at least until start supporting MCUs with 64bit. Change-Id: Ia001db81ed007e6a43f34506fed9be1345b88a4b Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-10-09 18:20:52 +08:00
config ARCH
default "arc"
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
ARC: Add support for ARC HS family of CPU cores The ARC HS is a family of high performance CPUs from Synopsys capable of running wide range of applications from heavy DPS calculation to full-scale OS. Still as with other ARC cores ARC HS might be tailored to a particular application. As opposed to EM cores ARC HS cores always have support of unaligned data access and by default GCC generates such a data layout with so we have to always enable unaligned data access in runtime otherwise on attempt to access such data we'd see "Unaligned memory exception". Note we had to explicitly mention CONFIG_CPU_ARCEM=y in all current defconfigs as CPU_ARC{EM|HS} are now parts of a choice so we cannot simply select ether option in board's Kconfig. And while at it change "-mmpy-option" of ARC EM to "wlh1" which is the same as previously used "6" but matches Programmer's Reference Manual (PRM) and is more human-friendly. Signed-off-by: Wayne Ren <wei.ren@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-06-04 14:57:27 +08:00
choice
prompt "ARC core family"
default CPU_ARCEM
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
ARC: Mention ARC EM family instead of EM4 template ARC EM4 is just a baseline configuration of ARC EM family of CPU cores. But with addition of more featuers like caches, DSP extensions etc we're effectively getting EM6, EM5D etc templates. So to not confuse users let's talk about families of ARC cores as that's what makes sense together with extra features but not templates itself. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-06-04 13:37:31 +08:00
config CPU_ARCEM
ARC: Add support for ARC HS family of CPU cores The ARC HS is a family of high performance CPUs from Synopsys capable of running wide range of applications from heavy DPS calculation to full-scale OS. Still as with other ARC cores ARC HS might be tailored to a particular application. As opposed to EM cores ARC HS cores always have support of unaligned data access and by default GCC generates such a data layout with so we have to always enable unaligned data access in runtime otherwise on attempt to access such data we'd see "Unaligned memory exception". Note we had to explicitly mention CONFIG_CPU_ARCEM=y in all current defconfigs as CPU_ARC{EM|HS} are now parts of a choice so we cannot simply select ether option in board's Kconfig. And while at it change "-mmpy-option" of ARC EM to "wlh1" which is the same as previously used "6" but matches Programmer's Reference Manual (PRM) and is more human-friendly. Signed-off-by: Wayne Ren <wei.ren@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-06-04 14:57:27 +08:00
bool "ARC EM cores"
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
select CPU_ARCV2
nanokernel: move C atomic operations to centralized code These C variants of atomic operations can work on any arch, have platforms select them if they don't have ASM equivalents. Change-Id: I38eb03bb58beff865681ee56ef7bc0fcded1e906 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-04-27 00:59:44 +08:00
select ATOMIC_OPERATIONS_C
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
help
ARC: Mention ARC EM family instead of EM4 template ARC EM4 is just a baseline configuration of ARC EM family of CPU cores. But with addition of more featuers like caches, DSP extensions etc we're effectively getting EM6, EM5D etc templates. So to not confuse users let's talk about families of ARC cores as that's what makes sense together with extra features but not templates itself. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-06-04 13:37:31 +08:00
This option signifies the use of an ARC EM CPU
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
ARC: Add support for ARC HS family of CPU cores The ARC HS is a family of high performance CPUs from Synopsys capable of running wide range of applications from heavy DPS calculation to full-scale OS. Still as with other ARC cores ARC HS might be tailored to a particular application. As opposed to EM cores ARC HS cores always have support of unaligned data access and by default GCC generates such a data layout with so we have to always enable unaligned data access in runtime otherwise on attempt to access such data we'd see "Unaligned memory exception". Note we had to explicitly mention CONFIG_CPU_ARCEM=y in all current defconfigs as CPU_ARC{EM|HS} are now parts of a choice so we cannot simply select ether option in board's Kconfig. And while at it change "-mmpy-option" of ARC EM to "wlh1" which is the same as previously used "6" but matches Programmer's Reference Manual (PRM) and is more human-friendly. Signed-off-by: Wayne Ren <wei.ren@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-06-04 14:57:27 +08:00
config CPU_ARCHS
bool "ARC HS cores"
select CPU_ARCV2
select ATOMIC_OPERATIONS_BUILTIN
help
This option signifies the use of an ARC HS CPU
endchoice
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
menu "ARCv2 Family Options"
config CPU_ARCV2
bool
arch: arc: fix the bug in HW_STACK_PROTECTION * HW_STACK_PROTECTION can be done by STACK_ CHECKING or MPU stack guard. ARC STACK_CHECKING is prioritized over MPU-based stack guard Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-03-20 14:17:37 +08:00
select ARCH_HAS_STACK_PROTECTION if ARC_HAS_STACK_CHECKING || ARC_MPU
select ARCH_HAS_USERSPACE if ARC_MPU
arch: arc: implement z_arch_switch to replace swap * here use new style z_arch_switch,i.e. CONFIG_USE_SWITCH to replace old swap mechnism. * it's also required by SMP support Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-06-13 17:21:52 +08:00
select USE_SWITCH
select USE_SWITCH_SUPPORTED
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
default y
help
This option signifies the use of a CPU of the ARCv2 family.
config DATA_ENDIANNESS_LITTLE
bool
default y
help
This is driven by the processor implementation, since it is fixed in
hardware. The BSP should set this value to 'n' if the data is
implemented as big endian.
config NUM_IRQ_PRIO_LEVELS
Kconfig: Use a short, consistent style for prompts Consistently use config FOO bool/int/hex/string "Prompt text" instead of config FOO bool/int/hex/string prompt "Prompt text" (...and a bunch of other variations that e.g. swapped the order of the type and the 'prompt', or put other properties between them). The shorthand is fully equivalent to using 'prompt'. It saves lines and avoids tricking people into thinking there is some semantic difference. Most of the grunt work was done by a modified version of https://unix.stackexchange.com/questions/26284/ how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some of the rarer variations had to be converted manually. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-14 22:19:20 +08:00
int "Number of supported interrupt priority levels"
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
range 1 16
help
Interrupt priorities available will be 0 to NUM_IRQ_PRIO_LEVELS-1.
The minimum value is 1.
The BSP must provide a valid default for proper operation.
config NUM_IRQS
Kconfig: Use a short, consistent style for prompts Consistently use config FOO bool/int/hex/string "Prompt text" instead of config FOO bool/int/hex/string prompt "Prompt text" (...and a bunch of other variations that e.g. swapped the order of the type and the 'prompt', or put other properties between them). The shorthand is fully equivalent to using 'prompt'. It saves lines and avoids tricking people into thinking there is some semantic difference. Most of the grunt work was done by a modified version of https://unix.stackexchange.com/questions/26284/ how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some of the rarer variations had to be converted manually. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-14 22:19:20 +08:00
int "Upper limit of interrupt numbers/IDs used"
arc: correctly size the IRQ vector table CONFIG_NUM_IRQS expresses the total number of available interrupt lines in the system, and is used to generate a vector table. On ARC, the vector table is assembled from two parts, _VectorTable for the first 16 entries (reserved for CPU exceptions), and _IrqVectorTable for the remainder. The code that creates _IrqVectorTable was not taking this into consideration and was 16 entries too big. Change-Id: I676c8534274de8782178f3773bc53a817b89481f Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-01-05 05:54:14 +08:00
range 17 256
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
help
Interrupts available will be 0 to NUM_IRQS-1.
arc: correctly size the IRQ vector table CONFIG_NUM_IRQS expresses the total number of available interrupt lines in the system, and is used to generate a vector table. On ARC, the vector table is assembled from two parts, _VectorTable for the first 16 entries (reserved for CPU exceptions), and _IrqVectorTable for the remainder. The code that creates _IrqVectorTable was not taking this into consideration and was 16 entries too big. Change-Id: I676c8534274de8782178f3773bc53a817b89481f Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-01-05 05:54:14 +08:00
The minimum value is 17 as the first 16 entries in the vector
table are for CPU exceptions.
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
The BSP must provide a valid default. This drives the size of the
vector table.
arc: RGF_NUM_BANKS is another configurable option for ARCs In order to add the EM7D SOC, I will be implementing a version of the FIRQ interrupt handler that saves and restores registers on the stack when RGF_NUM_BANKS==1. All other ARC SOCs at this time have RGF_NUM_BANKS==2, allowing for a faster handler that can use the registers in the 2nd register bank. But EM7D doesn't have this 2nd bank, hence the need for this new configurable choice. (See ZEP-966) Change-Id: Ie089f1f079902552cf279c2cda23ee0805b01eed Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-08 01:29:11 +08:00
config RGF_NUM_BANKS
Kconfig: Use a short, consistent style for prompts Consistently use config FOO bool/int/hex/string "Prompt text" instead of config FOO bool/int/hex/string prompt "Prompt text" (...and a bunch of other variations that e.g. swapped the order of the type and the 'prompt', or put other properties between them). The shorthand is fully equivalent to using 'prompt'. It saves lines and avoids tricking people into thinking there is some semantic difference. Most of the grunt work was done by a modified version of https://unix.stackexchange.com/questions/26284/ how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some of the rarer variations had to be converted manually. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-14 22:19:20 +08:00
int "Number of General Purpose Register Banks"
arc: RGF_NUM_BANKS is another configurable option for ARCs In order to add the EM7D SOC, I will be implementing a version of the FIRQ interrupt handler that saves and restores registers on the stack when RGF_NUM_BANKS==1. All other ARC SOCs at this time have RGF_NUM_BANKS==2, allowing for a faster handler that can use the registers in the 2nd register bank. But EM7D doesn't have this 2nd bank, hence the need for this new configurable choice. (See ZEP-966) Change-Id: Ie089f1f079902552cf279c2cda23ee0805b01eed Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-08 01:29:11 +08:00
depends on CPU_ARCV2
range 1 2
default 2
help
kconfig: fix help syntax and add spaces Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 23:08:21 +08:00
The ARC CPU can be configured to have more than one register
bank. If fast interrupts are supported (FIRQ), the 2nd
register bank, in the set, will be used by FIRQ interrupts.
If fast interrupts are supported but there is only 1
register bank, the fast interrupt handler must save
and restore general purpose registers.
arc: RGF_NUM_BANKS is another configurable option for ARCs In order to add the EM7D SOC, I will be implementing a version of the FIRQ interrupt handler that saves and restores registers on the stack when RGF_NUM_BANKS==1. All other ARC SOCs at this time have RGF_NUM_BANKS==2, allowing for a faster handler that can use the registers in the 2nd register bank. But EM7D doesn't have this 2nd bank, hence the need for this new configurable choice. (See ZEP-966) Change-Id: Ie089f1f079902552cf279c2cda23ee0805b01eed Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-10-08 01:29:11 +08:00
arch: arc: Add FIRQ option Add FIRQ option and change the _isr_wrapper. Currently, firq is enabled by default, but in some arc configuration, firq can be disabled. Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2017-11-29 16:55:18 +08:00
config ARC_FIRQ
Kconfig: Use a short, consistent style for prompts Consistently use config FOO bool/int/hex/string "Prompt text" instead of config FOO bool/int/hex/string prompt "Prompt text" (...and a bunch of other variations that e.g. swapped the order of the type and the 'prompt', or put other properties between them). The shorthand is fully equivalent to using 'prompt'. It saves lines and avoids tricking people into thinking there is some semantic difference. Most of the grunt work was done by a modified version of https://unix.stackexchange.com/questions/26284/ how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some of the rarer variations had to be converted manually. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-14 22:19:20 +08:00
bool "FIRQ enable"
arch: arc: Add FIRQ option Add FIRQ option and change the _isr_wrapper. Currently, firq is enabled by default, but in some arc configuration, firq can be disabled. Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2017-11-29 16:55:18 +08:00
default y
help
kconfig: fix help text indentation Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-01-06 20:41:34 +08:00
Fast interrupts are supported (FIRQ). If FIRQ enabled, for interrupts
with highest priority, status32 and pc will be saved in aux regs,
other regs will be saved according to the number of register bank;
If FIRQ is disabled, the handle of interrupts with highest priority
will be same with other interrupts.
arch: arc: Add FIRQ option Add FIRQ option and change the _isr_wrapper. Currently, firq is enabled by default, but in some arc configuration, firq can be disabled. Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2017-11-29 16:55:18 +08:00
arch: arc: fix the bug in HW_STACK_PROTECTION * HW_STACK_PROTECTION can be done by STACK_ CHECKING or MPU stack guard. ARC STACK_CHECKING is prioritized over MPU-based stack guard Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-03-20 14:17:37 +08:00
config ARC_HAS_STACK_CHECKING
bool "ARC has STACK_CHECKING"
default y
help
ARC is configured with STACK_CHECKING which is a mechanism for
checking stack accesses and raising an exception when a stack
overflow or underflow is detected.
arch: arc: add basic arc connect driver support * arc connect is a component to connect multiple arc cores * it's necessary for arc smp support * the following features are implemented * inter-core interrupt unit * gloabl free running counter * inter-core debug unit * interrupt distribute unit Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-07-24 17:47:29 +08:00
config ARC_CONNECT
bool "ARC has ARC connect"
select SCHED_IPI_SUPPORTED
help
ARC is configured with ARC CONNECT which is a hardware for connecting
multi cores.
arch: arc: fix the bug in HW_STACK_PROTECTION * HW_STACK_PROTECTION can be done by STACK_ CHECKING or MPU stack guard. ARC STACK_CHECKING is prioritized over MPU-based stack guard Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-03-20 14:17:37 +08:00
config ARC_STACK_CHECKING
bool
help
Use ARC STACK_CHECKING to do stack protection
config ARC_STACK_PROTECTION
kconfig: generalised stack protection options Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-09 09:14:06 +08:00
bool
default y if HW_STACK_PROTECTION
arch: arc: fix the bug in HW_STACK_PROTECTION * HW_STACK_PROTECTION can be done by STACK_ CHECKING or MPU stack guard. ARC STACK_CHECKING is prioritized over MPU-based stack guard Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-03-20 14:17:37 +08:00
select ARC_STACK_CHECKING if ARC_HAS_STACK_CHECKING
select MPU_STACK_GUARD if (!ARC_STACK_CHECKING && ARC_MPU)
arc: fix CONFIG_ARC_STACK_CHECKING - There's no clear need to disable frame pointers if this feature is used, remove this directive. - The 'top' and 'base' terms are reversed. The 'base' is the high address of the stack. The top is the lowest address, where we cannot push further down. Fixup member and offset names to correspond to how these terms are used in hardware documentation. - Use correct pointers for stack top location - Fatal exceptions now go through _NanoFatalErrorHandler to report the faulting ip and thread. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-12 06:33:16 +08:00
select THREAD_STACK_INFO
arc: implement stack checking ARC CPU has stack checking feature that allows to trigger an exception whenever the stack is incorrectly accessed. This patch implements the stack_top and stack_base register updates on context switches, and activates the Stack Checking bit of STATUS32 register when the CPU is in the context of a fiber or task. As GCC accesses the non-yet allocated stack with frame pointer enabled, this patch also add the omit-frame-pointer gcc flag in order to work properly. Change-Id: Ia9e224085a03bd29d682fb8f51f8e712f2ccb556 Signed-off-by: Alexandre d'Alton <alexandre.dalton@intel.com>
2016-03-12 01:29:14 +08:00
help
arch: arc: fix the bug in HW_STACK_PROTECTION * HW_STACK_PROTECTION can be done by STACK_ CHECKING or MPU stack guard. ARC STACK_CHECKING is prioritized over MPU-based stack guard Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-03-20 14:17:37 +08:00
This option enables either:
- The ARC stack checking, or
- the MPU-based stack guard
to cause a system fatal error
if the bounds of the current process stack are overflowed.
The two stack guard options are mutually exclusive. The
selection of the ARC stack checking is
prioritized over the MPU-based stack guard.
arc: implement stack checking ARC CPU has stack checking feature that allows to trigger an exception whenever the stack is incorrectly accessed. This patch implements the stack_top and stack_base register updates on context switches, and activates the Stack Checking bit of STATUS32 register when the CPU is in the context of a fiber or task. As GCC accesses the non-yet allocated stack with frame pointer enabled, this patch also add the omit-frame-pointer gcc flag in order to work properly. Change-Id: Ia9e224085a03bd29d682fb8f51f8e712f2ccb556 Signed-off-by: Alexandre d'Alton <alexandre.dalton@intel.com>
2016-03-12 01:29:14 +08:00
arc: Add support for unaligned access ARCv2 cores may access data not aligned by the data size boundary. I.e. read entire 32-bit word from address 0x1. This feature is configurable for ARC EM cores excluding those with secure shield 2+2 mode. When it's available in hardware it's required to enable that feature in run-time as well setting status32.AD bit. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-07-17 06:10:39 +08:00
config ARC_USE_UNALIGNED_MEM_ACCESS
bool "Enable unaligned access in HW"
default n if CPU_ARCEM
ARC: Add support for ARC HS family of CPU cores The ARC HS is a family of high performance CPUs from Synopsys capable of running wide range of applications from heavy DPS calculation to full-scale OS. Still as with other ARC cores ARC HS might be tailored to a particular application. As opposed to EM cores ARC HS cores always have support of unaligned data access and by default GCC generates such a data layout with so we have to always enable unaligned data access in runtime otherwise on attempt to access such data we'd see "Unaligned memory exception". Note we had to explicitly mention CONFIG_CPU_ARCEM=y in all current defconfigs as CPU_ARC{EM|HS} are now parts of a choice so we cannot simply select ether option in board's Kconfig. And while at it change "-mmpy-option" of ARC EM to "wlh1" which is the same as previously used "6" but matches Programmer's Reference Manual (PRM) and is more human-friendly. Signed-off-by: Wayne Ren <wei.ren@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-06-04 14:57:27 +08:00
default y if CPU_ARCHS
depends on (CPU_ARCEM && !ARC_HAS_SECURE) || CPU_ARCHS
arc: Add support for unaligned access ARCv2 cores may access data not aligned by the data size boundary. I.e. read entire 32-bit word from address 0x1. This feature is configurable for ARC EM cores excluding those with secure shield 2+2 mode. When it's available in hardware it's required to enable that feature in run-time as well setting status32.AD bit. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-07-17 06:10:39 +08:00
help
ARC EM cores w/o secure shield 2+2 mode support might be configured
to support unaligned memory access which is then disabled by default.
Enable unaligned access in hardware and make software to use it.
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
config FAULT_DUMP
Kconfig: Use a short, consistent style for prompts Consistently use config FOO bool/int/hex/string "Prompt text" instead of config FOO bool/int/hex/string prompt "Prompt text" (...and a bunch of other variations that e.g. swapped the order of the type and the 'prompt', or put other properties between them). The shorthand is fully equivalent to using 'prompt'. It saves lines and avoids tricking people into thinking there is some semantic difference. Most of the grunt work was done by a modified version of https://unix.stackexchange.com/questions/26284/ how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some of the rarer variations had to be converted manually. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-14 22:19:20 +08:00
int "Fault dump level"
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
default 2
define range for FAULT_DUMP config variable Only allow valid values to be set for this option. Change-Id: I11dd7381ddbf6d4d9985255b9b784544074aba63 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-11-02 06:21:26 +08:00
range 0 2
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
help
kconfig: fix help syntax and add spaces Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 23:08:21 +08:00
Different levels for display information when a fault occurs.
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
kconfig: fix help syntax and add spaces Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 23:08:21 +08:00
2: The default. Display specific and verbose information. Consumes
doc: fix blank line and unindent error in FAULT_DUMP option Change-Id: I5fe38a03c0c16f89e5f456a62eb38d058380d00c Signed-off-by: Javier B Perez <javier.b.perez.hernandez@intel.com>
2016-06-22 03:34:38 +08:00
the most memory (long strings).
kconfig: fix help syntax and add spaces Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 23:08:21 +08:00
1: Display general and short information. Consumes less memory
doc: fix blank line and unindent error in FAULT_DUMP option Change-Id: I5fe38a03c0c16f89e5f456a62eb38d058380d00c Signed-off-by: Javier B Perez <javier.b.perez.hernandez@intel.com>
2016-06-22 03:34:38 +08:00
(short strings).
kconfig: fix help syntax and add spaces Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 23:08:21 +08:00
0: Off.
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
config XIP
arch: arc: Kconfig: Remove redundant 'default n' properties Bool symbols implicitly default to 'n'. A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you want to override a 'default y' on the base definition of the symbol. It isn't used like that on any of these symbols though. Also fix the 'default' on XIP. Due to Zephyr's prefer-later-defaults behavior, it was always set to 'y' (when the dependencies were satisfied). Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-22 06:37:17 +08:00
default y if !UART_NSIM
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
arc: enable gen_isr_tables mechanism Change-Id: I5897e110f554377796bfe38dd5c0f8652c29e5be Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-14 01:36:32 +08:00
config GEN_ISR_TABLES
default y
config GEN_IRQ_START_VECTOR
default 16
arc: Add CONFIG_HARVARD since some ARC CPU Architectures are Harvard. Some ARC SOC implementations will need CONFIG_HARVARD so as to select a different initial stack pointer (one at the top of DCCM memory), and also to select a different linker command file that uses ICCM and DCCM. Quark_se_ss will have HARVARD equal to n. Change-Id: Idb7c4126866c9604e1924200ad5fdd2bc9d28269 Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-05-07 08:23:05 +08:00
config HARVARD
Kconfig: Use a short, consistent style for prompts Consistently use config FOO bool/int/hex/string "Prompt text" instead of config FOO bool/int/hex/string prompt "Prompt text" (...and a bunch of other variations that e.g. swapped the order of the type and the 'prompt', or put other properties between them). The shorthand is fully equivalent to using 'prompt'. It saves lines and avoids tricking people into thinking there is some semantic difference. Most of the grunt work was done by a modified version of https://unix.stackexchange.com/questions/26284/ how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some of the rarer variations had to be converted manually. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-14 22:19:20 +08:00
bool "Harvard Architecture"
arc: Add CONFIG_HARVARD since some ARC CPU Architectures are Harvard. Some ARC SOC implementations will need CONFIG_HARVARD so as to select a different initial stack pointer (one at the top of DCCM memory), and also to select a different linker command file that uses ICCM and DCCM. Quark_se_ss will have HARVARD equal to n. Change-Id: Idb7c4126866c9604e1924200ad5fdd2bc9d28269 Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-05-07 08:23:05 +08:00
help
kconfig: fix help syntax and add spaces Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 23:08:21 +08:00
The ARC CPU can be configured to have two busses;
one for instruction fetching and another that serves as a data bus.
boards: Update arc em_starterkit support from 2.2 to 2.3 Here are the main changes: * board: Update EMSK onboard resources such as Button, Switch and LEDs + update soc.h for em7d, em9d, em11d + update board.h for em_starterkit board * arc: Add floating point support and code density support + add kconfig configuration + add compiler options + add register definitions, marcos, assembly codes + fixes in existing codes and configurations. * arc: Update detailed board configurations for cores of emsk 2.3 * script: Provide arc_debugger.sh for debugging em_starterkit board + make BOARD=em_starterkit debug This will start openocd server for emsk, and arc gdb will connect to this debug server, user can run `continue` command if user just want to run the application, or other commands if debugging needed. + make BOARD=em_starterkit debugserver This will start an openocd debugger server for emsk, and user can connect to this debugserver using arc gdb and do what they want to. + make BOARD=em_starterkit flash This will download the zephyr application elf file to emsk, and run it. Signed-off-by: Huaqi Fang <huaqi.fang@synopsys.com>
2017-05-17 15:18:51 +08:00
config CODE_DENSITY
Kconfig: Use a short, consistent style for prompts Consistently use config FOO bool/int/hex/string "Prompt text" instead of config FOO bool/int/hex/string prompt "Prompt text" (...and a bunch of other variations that e.g. swapped the order of the type and the 'prompt', or put other properties between them). The shorthand is fully equivalent to using 'prompt'. It saves lines and avoids tricking people into thinking there is some semantic difference. Most of the grunt work was done by a modified version of https://unix.stackexchange.com/questions/26284/ how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some of the rarer variations had to be converted manually. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-14 22:19:20 +08:00
bool "Code Density Option"
boards: Update arc em_starterkit support from 2.2 to 2.3 Here are the main changes: * board: Update EMSK onboard resources such as Button, Switch and LEDs + update soc.h for em7d, em9d, em11d + update board.h for em_starterkit board * arc: Add floating point support and code density support + add kconfig configuration + add compiler options + add register definitions, marcos, assembly codes + fixes in existing codes and configurations. * arc: Update detailed board configurations for cores of emsk 2.3 * script: Provide arc_debugger.sh for debugging em_starterkit board + make BOARD=em_starterkit debug This will start openocd server for emsk, and arc gdb will connect to this debug server, user can run `continue` command if user just want to run the application, or other commands if debugging needed. + make BOARD=em_starterkit debugserver This will start an openocd debugger server for emsk, and user can connect to this debugserver using arc gdb and do what they want to. + make BOARD=em_starterkit flash This will download the zephyr application elf file to emsk, and run it. Signed-off-by: Huaqi Fang <huaqi.fang@synopsys.com>
2017-05-17 15:18:51 +08:00
help
kconfig: fix help syntax and add spaces Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 23:08:21 +08:00
Enable code density option to get better code density
boards: Update arc em_starterkit support from 2.2 to 2.3 Here are the main changes: * board: Update EMSK onboard resources such as Button, Switch and LEDs + update soc.h for em7d, em9d, em11d + update board.h for em_starterkit board * arc: Add floating point support and code density support + add kconfig configuration + add compiler options + add register definitions, marcos, assembly codes + fixes in existing codes and configurations. * arc: Update detailed board configurations for cores of emsk 2.3 * script: Provide arc_debugger.sh for debugging em_starterkit board + make BOARD=em_starterkit debug This will start openocd server for emsk, and arc gdb will connect to this debug server, user can run `continue` command if user just want to run the application, or other commands if debugging needed. + make BOARD=em_starterkit debugserver This will start an openocd debugger server for emsk, and user can connect to this debugserver using arc gdb and do what they want to. + make BOARD=em_starterkit flash This will download the zephyr application elf file to emsk, and run it. Signed-off-by: Huaqi Fang <huaqi.fang@synopsys.com>
2017-05-17 15:18:51 +08:00
arch: arc: add handling for accl regs, r25, r30 * when fpu is configured or mpy_option > 6, accl regs (r58, r59) will be configured, they are used by fpu and mac, and are caller -saved scratch regs, so need to be saved before jumping to interrupt handlers * r25 and r30 are also caller-saved scratch reg. Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-07-30 19:53:30 +08:00
config ARC_HAS_ACCL_REGS
bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6)"
default y if FLOAT
help
Depending on the configuration, CPU can contain accumulator reg-pair
(also referred to as r58:r59). These can also be used by gcc as GPR so
kernel needs to save/restore per process
arch: arc: add initial support of ARC TEE * it's based on ARC SecureShield * add basic secure service in arch/arc/core/secureshield * necesssary changes in arch level * thread switch * irq/exception handling * initialization * add secure time support Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-01 12:39:35 +08:00
config ARC_HAS_SECURE
bool "ARC has SecureShield"
select CPU_HAS_TEE
select ARCH_HAS_TRUSTED_EXECUTION
help
This option is enabled when ARC core supports secure mode
config SJLI_TABLE_SIZE
int "SJLI table size"
depends on ARC_SECURE_FIRMWARE
default 8
help
The size of sjli (Secure Jump and Link Indexed) table. The
code in normal mode call secure services in secure mode through
sjli instruction.
config ARC_SECURE_FIRMWARE
prompt "Generate Secure Firmware"
bool
depends on ARC_HAS_SECURE
default y if TRUSTED_EXECUTION_SECURE
help
This option indicates that we are building a Zephyr image that
is intended to execute in secure mode. The option is only
applicable to ARC processors that implement the SecureShield.
This option enables Zephyr to include code that executes in
secure mode, as well as to exclude code that is designed to
execute only in normal mode.
Code executing in secure mode has access to both the secure
and normal resources of the ARC processors.
config ARC_NORMAL_FIRMWARE
prompt "Generate Normal Firmware"
bool
depends on !ARC_SECURE_FIRMWARE
depends on ARC_HAS_SECURE
default y if TRUSTED_EXECUTION_NONSECURE
help
This option indicates that we are building a Zephyr image that
is intended to execute in normal mode. Execution of this
image is triggered by secure firmware that executes in secure
mode. The option is only applicable to ARC processors that
implement the SecureShield.
This option enables Zephyr to include code that executes in
normal mode only, as well as to exclude code that is
designed to execute only in secure mode.
Code executing in normal mode has no access to secure
resources of the ARC processors, and, therefore, it shall avoid
accessing them.
arch: arc: Add mpu support * add arc mpu driver * modify the corresponding kconfig and kbuild * currently only em_starterkit 2.2's em7d configuration has mpu feature (mpu version 2) * as the minimum region size of arc mpu version 2 is 2048 bytes and region size should be power of 2, the stack size of threads (including main thread and idle thread) should be at least 2048 bytes and power of 2 * for mpu stack guard feature, a stack guard region of 2048 bytes is generated. This brings more memory footprint * For arc mpu version 3, the minimum region size is 32 bytes. * the codes are tested by the mpu_stack_guard_test and stackprot Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2017-08-15 12:20:42 +08:00
menu "ARC MPU Options"
depends on CPU_HAS_MPU
config ARC_MPU_ENABLE
bool "Enable MPU"
select ARC_MPU
help
Enable MPU
source "arch/arc/core/mpu/Kconfig"
endmenu
arc: cache.h support added for em7d and em11d SOC An implementation to flush multiple d-cache lines has been added per the top-level cache.h API. ZEP-1153 was opened to express the need for MORE i-cache and d-cache APIs. For example, the current cache.h API doesn't provide a means to invalidate d-cache lines and has nothing for i-cache. I've also modified some of the i-cache related aux registers to have better names so that they won't be confused with d-cache. These changes are for ZEP-1176. Change-Id: If4c5410451cc40dcd5618fc871093c8febf7e061 Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-11-05 05:48:23 +08:00
config CACHE_LINE_SIZE_DETECT
Kconfig: Use a short, consistent style for prompts Consistently use config FOO bool/int/hex/string "Prompt text" instead of config FOO bool/int/hex/string prompt "Prompt text" (...and a bunch of other variations that e.g. swapped the order of the type and the 'prompt', or put other properties between them). The shorthand is fully equivalent to using 'prompt'. It saves lines and avoids tricking people into thinking there is some semantic difference. Most of the grunt work was done by a modified version of https://unix.stackexchange.com/questions/26284/ how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some of the rarer variations had to be converted manually. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-14 22:19:20 +08:00
bool "Detect d-cache line size at runtime"
arc: cache.h support added for em7d and em11d SOC An implementation to flush multiple d-cache lines has been added per the top-level cache.h API. ZEP-1153 was opened to express the need for MORE i-cache and d-cache APIs. For example, the current cache.h API doesn't provide a means to invalidate d-cache lines and has nothing for i-cache. I've also modified some of the i-cache related aux registers to have better names so that they won't be confused with d-cache. These changes are for ZEP-1176. Change-Id: If4c5410451cc40dcd5618fc871093c8febf7e061 Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-11-05 05:48:23 +08:00
help
kconfig: fix help syntax and add spaces Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 23:08:21 +08:00
This option enables querying the d-cache build register for finding
the d-cache line size at the expense of taking more memory and code
and a slightly increased boot time.
arc: cache.h support added for em7d and em11d SOC An implementation to flush multiple d-cache lines has been added per the top-level cache.h API. ZEP-1153 was opened to express the need for MORE i-cache and d-cache APIs. For example, the current cache.h API doesn't provide a means to invalidate d-cache lines and has nothing for i-cache. I've also modified some of the i-cache related aux registers to have better names so that they won't be confused with d-cache. These changes are for ZEP-1176. Change-Id: If4c5410451cc40dcd5618fc871093c8febf7e061 Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-11-05 05:48:23 +08:00
kconfig: fix help syntax and add spaces Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 23:08:21 +08:00
If the CPU's d-cache line size is known in advance, disable this
option and manually enter the value for CACHE_LINE_SIZE.
arc: cache.h support added for em7d and em11d SOC An implementation to flush multiple d-cache lines has been added per the top-level cache.h API. ZEP-1153 was opened to express the need for MORE i-cache and d-cache APIs. For example, the current cache.h API doesn't provide a means to invalidate d-cache lines and has nothing for i-cache. I've also modified some of the i-cache related aux registers to have better names so that they won't be confused with d-cache. These changes are for ZEP-1176. Change-Id: If4c5410451cc40dcd5618fc871093c8febf7e061 Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-11-05 05:48:23 +08:00
config CACHE_LINE_SIZE
Kconfig: Use a short, consistent style for prompts Consistently use config FOO bool/int/hex/string "Prompt text" instead of config FOO bool/int/hex/string prompt "Prompt text" (...and a bunch of other variations that e.g. swapped the order of the type and the 'prompt', or put other properties between them). The shorthand is fully equivalent to using 'prompt'. It saves lines and avoids tricking people into thinking there is some semantic difference. Most of the grunt work was done by a modified version of https://unix.stackexchange.com/questions/26284/ how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some of the rarer variations had to be converted manually. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-14 22:19:20 +08:00
int "Cache line size" if !CACHE_LINE_SIZE_DETECT
arc: cache.h support added for em7d and em11d SOC An implementation to flush multiple d-cache lines has been added per the top-level cache.h API. ZEP-1153 was opened to express the need for MORE i-cache and d-cache APIs. For example, the current cache.h API doesn't provide a means to invalidate d-cache lines and has nothing for i-cache. I've also modified some of the i-cache related aux registers to have better names so that they won't be confused with d-cache. These changes are for ZEP-1176. Change-Id: If4c5410451cc40dcd5618fc871093c8febf7e061 Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-11-05 05:48:23 +08:00
default 32
help
kconfig: fix help syntax and add spaces Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 23:08:21 +08:00
Size in bytes of a CPU d-cache line.
arc: cache.h support added for em7d and em11d SOC An implementation to flush multiple d-cache lines has been added per the top-level cache.h API. ZEP-1153 was opened to express the need for MORE i-cache and d-cache APIs. For example, the current cache.h API doesn't provide a means to invalidate d-cache lines and has nothing for i-cache. I've also modified some of the i-cache related aux registers to have better names so that they won't be confused with d-cache. These changes are for ZEP-1176. Change-Id: If4c5410451cc40dcd5618fc871093c8febf7e061 Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-11-05 05:48:23 +08:00
kconfig: fix help syntax and add spaces Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 23:08:21 +08:00
Detect automatically at runtime by selecting CACHE_LINE_SIZE_DETECT.
arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
arc: cache.h support added for em7d and em11d SOC An implementation to flush multiple d-cache lines has been added per the top-level cache.h API. ZEP-1153 was opened to express the need for MORE i-cache and d-cache APIs. For example, the current cache.h API doesn't provide a means to invalidate d-cache lines and has nothing for i-cache. I've also modified some of the i-cache related aux registers to have better names so that they won't be confused with d-cache. These changes are for ZEP-1176. Change-Id: If4c5410451cc40dcd5618fc871093c8febf7e061 Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-11-05 05:48:23 +08:00
config ARCH_CACHE_FLUSH_DETECT
bool
config CACHE_FLUSHING
Kconfig: Use a short, consistent style for prompts Consistently use config FOO bool/int/hex/string "Prompt text" instead of config FOO bool/int/hex/string prompt "Prompt text" (...and a bunch of other variations that e.g. swapped the order of the type and the 'prompt', or put other properties between them). The shorthand is fully equivalent to using 'prompt'. It saves lines and avoids tricking people into thinking there is some semantic difference. Most of the grunt work was done by a modified version of https://unix.stackexchange.com/questions/26284/ how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some of the rarer variations had to be converted manually. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-14 22:19:20 +08:00
bool "Enable d-cache flushing mechanism"
arc: cache.h support added for em7d and em11d SOC An implementation to flush multiple d-cache lines has been added per the top-level cache.h API. ZEP-1153 was opened to express the need for MORE i-cache and d-cache APIs. For example, the current cache.h API doesn't provide a means to invalidate d-cache lines and has nothing for i-cache. I've also modified some of the i-cache related aux registers to have better names so that they won't be confused with d-cache. These changes are for ZEP-1176. Change-Id: If4c5410451cc40dcd5618fc871093c8febf7e061 Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-11-05 05:48:23 +08:00
help
kconfig: fix help syntax and add spaces Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 23:08:21 +08:00
This links in the sys_cache_flush() function, which provides a
way to flush multiple lines of the d-cache.
If the d-cache is present, set this to y.
If the d-cache is NOT present, set this to n.
arc: cache.h support added for em7d and em11d SOC An implementation to flush multiple d-cache lines has been added per the top-level cache.h API. ZEP-1153 was opened to express the need for MORE i-cache and d-cache APIs. For example, the current cache.h API doesn't provide a means to invalidate d-cache lines and has nothing for i-cache. I've also modified some of the i-cache related aux registers to have better names so that they won't be confused with d-cache. These changes are for ZEP-1176. Change-Id: If4c5410451cc40dcd5618fc871093c8febf7e061 Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-11-05 05:48:23 +08:00
arch: arc: enlarge the exception handling stack after recent changes in zephyr's fault handling, e.g. use log to repace printk, it requires more stack to exception handling, or the stack overflow may happen and crash the system. this commit adds a kconfig option for exception stack size with a larger default size. Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-09-26 21:40:42 +08:00
config ARC_EXCEPTION_STACK_SIZE
int "ARC exception handling stack size"
default 768
help
Size in bytes of exception handling stack which is at the top of
interrupt stack to get smaller memory footprint because exception
is not frequent. To reduce the impact on interrupt handling,
especially nested interrupt, it cannot be too large.
arc: cache.h support added for em7d and em11d SOC An implementation to flush multiple d-cache lines has been added per the top-level cache.h API. ZEP-1153 was opened to express the need for MORE i-cache and d-cache APIs. For example, the current cache.h API doesn't provide a means to invalidate d-cache lines and has nothing for i-cache. I've also modified some of the i-cache related aux registers to have better names so that they won't be confused with d-cache. These changes are for ZEP-1176. Change-Id: If4c5410451cc40dcd5618fc871093c8febf7e061 Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-11-05 05:48:23 +08:00
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arc: add missing Kconfig/Makefiles to architecture Change-Id: I99e96853e5ddc9eb0dd9ca9711921d5b57448db7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-06-20 21:23:14 +08:00
arc: print human-readable exception info Right now only numerical values are printed which must be looked up in the Designware ARCv2 ISA Programmer's Reference, which is not public. Add a non-default Kconfig to print more information at the expense of footprint, and enable it for all the simulator targets. We only print code/parameter details for machine check and protection violations, more may be added later as desired. This should cover all the exceptions we commonly encounter for memory protection. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-04-04 05:25:28 +08:00
config ARC_EXCEPTION_DEBUG
bool "Unhandled exception debugging information"
default n
kernel: support log system for fatal errors We introduce a new z_fatal_print() API and replace all occurrences of exception handling code to use it. This routes messages to the logging subsystem if enabled. Otherwise, messages are sent to printk(). Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-07-16 13:03:56 +08:00
depends on PRINTK || LOG
arc: print human-readable exception info Right now only numerical values are printed which must be looked up in the Designware ARCv2 ISA Programmer's Reference, which is not public. Add a non-default Kconfig to print more information at the expense of footprint, and enable it for all the simulator targets. We only print code/parameter details for machine check and protection violations, more may be added later as desired. This should cover all the exceptions we commonly encounter for memory protection. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-04-04 05:25:28 +08:00
help
Print human-readable information about exception vectors, cause codes,
and parameters, at a cost of code/data size for the human-readable
strings.
kconfig: define architecture as a kconfig variable Do not depend on environment variables and use a kconfig variable for defining the architecture. In addition, remove the X86_32 variable, it just duplicates X86 for not good reason, at least until start supporting MCUs with 64bit. Change-Id: Ia001db81ed007e6a43f34506fed9be1345b88a4b Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2015-10-09 18:20:52 +08:00
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