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zephyr/boards/arm/96b_avenger96/96b_avenger96_defconfig

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boards: arm: Add 96Boards Avenger96 board support Add board support for 96Boards Avenger96 board from Arrow Electronics based on STM32MP157A MPU from ST Microelectronics. This board is one of the consumer editions boards of the 96Boards family following the Extented CE form factor. More information about this board can be found in 96Boards website: https://www.96boards.org/product/avenger96/ By default Zephyr console output is available via RAM console, but it can also be changed to UART7 exposed as UART0 on 40 pin LS header. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-06-13 01:39:13 +08:00
CONFIG_SOC_SERIES_STM32MP1X=y
CONFIG_SOC_STM32MP15_M4=y
board: arm: Enable MPU for all STM32 boards supporting it Only boards with at least 64K Flash will activate MPU because: MPU + UERSPACE + All switches implicity activated (CONFIG_MPU_STACK_GUARD, CONFIG_ARM_STACK_PROTECTION ...) will consume about 40K Flash (value computed on nucleo_f767_zi on tests/arch/arm/arm_ramfunc/). Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-06-06 04:20:43 +08:00
# Enable MPU
CONFIG_ARM_MPU=y
boards: stm32: Turn hardware stack protection on by default Enable HW stack protection by default on all STM32 when possible. This excludes all series based on M0(FO) and M0+(G0/L0). Also this is made only on boards with enabled MPU (SRAM > 64K). Cf similar change on nRF boards: #28470 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-09-21 22:53:25 +08:00
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
boards: arm: Add 96Boards Avenger96 board support Add board support for 96Boards Avenger96 board from Arrow Electronics based on STM32MP157A MPU from ST Microelectronics. This board is one of the consumer editions boards of the 96Boards family following the Extented CE form factor. More information about this board can be found in 96Boards website: https://www.96boards.org/product/avenger96/ By default Zephyr console output is available via RAM console, but it can also be changed to UART7 exposed as UART0 on 40 pin LS header. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-06-13 01:39:13 +08:00
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# pin mux configuration
CONFIG_PINMUX=y
# clock configuration
CONFIG_CLOCK_CONTROL=y
# console (remote proc console by default)
CONFIG_CONSOLE=y
CONFIG_RAM_CONSOLE=y
CONFIG_RAM_CONSOLE_BUFFER_SIZE=1024
# uart console (overrides remote proc console)
CONFIG_UART_CONSOLE=n