2019-11-11 00:17:19 +08:00
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/*
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* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Exception/interrupt context helpers for Cortex-A CPUs
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*
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* Exception/interrupt context helpers.
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*/
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2021-03-26 22:22:59 +08:00
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#ifndef ZEPHYR_ARCH_ARM64_INCLUDE_EXC_H_
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#define ZEPHYR_ARCH_ARM64_INCLUDE_EXC_H_
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2019-11-11 00:17:19 +08:00
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#include <arch/cpu.h>
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#ifdef _ASMLANGUAGE
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/* nothing */
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#else
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#include <irq_offload.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(CONFIG_IRQ_OFFLOAD)
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extern void z_arm64_offload(void);
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#endif
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static ALWAYS_INLINE bool arch_is_in_isr(void)
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{
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2020-11-09 15:52:37 +08:00
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return arch_curr_cpu()->nested != 0U;
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2019-11-11 00:17:19 +08:00
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}
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2020-08-04 18:52:16 +08:00
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extern void z_arm64_call_svc(void *switch_to, void **switched_from);
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2019-11-11 00:17:19 +08:00
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ASMLANGUAGE */
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2021-03-26 22:22:59 +08:00
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#endif /* ZEPHYR_ARCH_ARM64_INCLUDE_EXC_H_ */
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