2015-11-22 11:25:41 +08:00
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# Kconfig - Quark SE configuration options
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#
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2016-03-26 05:30:50 +08:00
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# Copyright (c) 2016 Intel Corporation
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2015-11-22 11:25:41 +08:00
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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2016-08-30 20:41:04 +08:00
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if X86 && SOC_QUARK_SE_C1000
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2015-11-22 11:25:41 +08:00
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2015-12-11 06:43:10 +08:00
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config EOI_FORWARDING_BUG
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bool
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default y
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help
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Quark SE LOAPIC has issues with forwarding EOI to the IOAPIC for level
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triggered interrupts, this is a SW workaround.
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2016-04-29 06:49:43 +08:00
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config SS_RESET_VECTOR
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hex "Sensor Subsystem Reset Vector"
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default 0x40000000
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help
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Sensor subsystem reset vector. This value is needed to init the ARC
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system on the SoC.
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2015-11-22 11:25:41 +08:00
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config ARC_INIT
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bool "Quark SE ARC Kickoff"
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default n
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help
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Allows x86 processor to kickoff the ARC slave processor.
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2016-07-30 04:27:29 +08:00
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config SYS_LOG_ARC_INIT_LEVEL
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int
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prompt "Quark SE Sensor Subsystem log level"
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default 0
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2016-05-12 05:40:01 +08:00
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help
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2016-07-30 04:27:29 +08:00
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Sets log level for the boot initialization and boot process of the sensor
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2016-05-12 05:40:01 +08:00
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sub-system.
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2016-07-30 04:27:29 +08:00
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Levels are:
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- 0 OFF, do not write
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- 1 ERROR, only write SYS_LOG_ERR
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- 2 WARNING, write SYS_LOG_WRN in adition to previous level
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- 3 INFO, write SYS_LOG_INF in adition to previous levels
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- 4 DEBUG, write SYS_LOG_DBG in adition to previous levels
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2016-05-12 05:40:01 +08:00
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config ARC_GDB_ENABLE
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2015-11-22 11:25:41 +08:00
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bool "Allows the usage of GDB with the ARC processor."
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depends on ARC_INIT
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default n
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help
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This option will stop the master processor from boot-strapping
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the ARC slave processor. This will allow GDB to halt and
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engage the ARC processor to proceed step by step execution.
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2016-08-17 01:58:40 +08:00
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if IPM
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config QUARK_SE_IPM_IRQ_PRI
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int "IPM interrupt priority"
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default 2
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help
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Priority level for interrupts coming in from the inter-processor
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mailboxes.
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2016-01-21 03:42:12 +08:00
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if IPM_CONSOLE_RECEIVER
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config QUARK_SE_IPM_CONSOLE_RING_BUF_SIZE32
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2016-01-30 02:37:28 +08:00
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int "IPM Console Ring Buffer Size"
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2016-01-21 03:42:12 +08:00
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default 256
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help
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Size of the buffer for the console reciever, for incoming
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console messages from the ARC side. Must be a power of 2.
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endif
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2016-08-17 01:58:40 +08:00
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endif
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2016-01-21 03:42:12 +08:00
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2016-10-18 21:25:07 +08:00
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config BSP_SHARED_RAM_ADDR
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hex "Address of the shared RAM with the QMSI Bootloader"
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depends on SYS_POWER_DEEP_SLEEP
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default 0xA8013FFC
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help
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Address of the memory shared between the BSP and the Bootloader in order
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to store restore information.
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config BSP_SHARED_RAM_SIZE
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hex "Size of the shared RAM with the QMSI Bootloader"
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depends on SYS_POWER_DEEP_SLEEP
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default 0x4
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help
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Size of the memory shared between the BSP and the Bootloader in order
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to store restore information.
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2016-08-30 20:41:04 +08:00
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endif #SOC_QUARK_SE_C1000_X86
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