zephyr/boards/riscv/hifive1_revb/board.cmake

# Copyright (c) 2019 SiFive Inc.
# SPDX-License-Identifier: Apache-2.0
board_runner_args(jlink "--device=FE310")
board_runner_args(jlink "--iface=JTAG")
board_runner_args(jlink "--speed=4000")
board_runner_args(jlink "--tool-opt=-jtagconf -1,-1")
board_runner_args(jlink "--tool-opt=-autoconnect 1")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
boards/riscv32: Add support for the HiFive1 Rev B The HiFive1 Rev B adds the following features to the original HiFive1: - A second UART peripheral 'uart_1' - A hardware I2C peripheral 'i2c_0' - Segger J-Link OB - An ESP32-WROOM attached to the 'spi_1' peripheral bus Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> 2019-03-20 00:36:55 +08:00			`# Copyright (c) 2019 SiFive Inc.`
			`# SPDX-License-Identifier: Apache-2.0`
			`board_runner_args(jlink "--device=FE310")`
			`board_runner_args(jlink "--iface=JTAG")`
			`board_runner_args(jlink "--speed=4000")`
			`board_runner_args(jlink "--tool-opt=-jtagconf -1,-1")`
			`board_runner_args(jlink "--tool-opt=-autoconnect 1")`
			`include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)`