2023-05-10 05:55:01 +08:00
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/*
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* Copyright (c) 2023 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/ambiq-apollo4-pinctrl.h>
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&pinctrl {
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uart0_default: uart0_default {
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group1 {
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pinmux = <UART0TX_P60>;
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};
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group2 {
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pinmux = <UART0RX_P47>;
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input-enable;
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};
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};
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2023-06-29 20:28:58 +08:00
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i2c0_default: i2c0_default {
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group1 {
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pinmux = <M0SCL_P5>, <M0SDAWIR3_P6>;
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drive-open-drain;
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drive-strength = "0.5";
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bias-pull-up;
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};
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};
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i2c1_default: i2c1_default {
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group1 {
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pinmux = <M1SCL_P8>, <M1SDAWIR3_P9>;
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drive-open-drain;
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drive-strength = "0.5";
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bias-pull-up;
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};
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};
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i2c2_default: i2c2_default {
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group1 {
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pinmux = <M2SCL_P25>, <M2SDAWIR3_P26>;
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drive-open-drain;
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drive-strength = "0.5";
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bias-pull-up;
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};
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};
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i2c3_default: i2c3_default {
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group1 {
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pinmux = <M3SCL_P31>, <M3SDAWIR3_P32>;
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drive-open-drain;
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drive-strength = "0.5";
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bias-pull-up;
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};
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};
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i2c4_default: i2c4_default {
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group1 {
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pinmux = <M4SCL_P34>, <M4SDAWIR3_P35>;
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drive-open-drain;
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drive-strength = "0.5";
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bias-pull-up;
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};
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};
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i2c5_default: i2c5_default {
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group1 {
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pinmux = <M5SCL_P47>, <M5SDAWIR3_P48>;
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drive-open-drain;
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drive-strength = "0.5";
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bias-pull-up;
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};
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};
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i2c6_default: i2c6_default {
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group1 {
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pinmux = <M6SCL_P61>, <M6SDAWIR3_P62>;
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drive-open-drain;
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drive-strength = "0.5";
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bias-pull-up;
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};
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};
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i2c7_default: i2c7_default {
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group1 {
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pinmux = <M7SCL_P22>, <M7SDAWIR3_P23>;
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drive-open-drain;
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drive-strength = "0.5";
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bias-pull-up;
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};
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};
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2023-05-10 05:55:01 +08:00
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};
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