OrgZephyr/zephyr
OrgZephyr
/
zephyr
mirror of https://github.com/zephyrproject-rtos/zephyr.git
1
0
Fork 0
Code Issues Releases Wiki Activity
zephyr/boards/arm/mps2_an521/mps2_an521-common.dtsi

171 lines
3.2 KiB
Plaintext
Raw Normal View History

arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
/*
* Copyright (c) 2019 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
dts: Add information about system bus frequency to the dts This commit adds a fixed clock node (representing clock driving system bus). The added node is then referenced by peripherals requiring information about driving clock frequency. Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-06-21 20:49:23 +08:00
sysclk: system-clock {
compatible = "fixed-clock";
clock-frequency = <25000000>;
#clock-cells = <0>;
};
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
timer0: timer@0 {
compatible = "arm,cmsdk-timer";
reg = <0x0 0x1000>;
interrupts = <3 3>;
boards/arm/mps2_an521: Add missing timer labels to dts The bindings for arm,cmsdk-{d}timer requires a label so add it into the dts since its missing on mps2_an521. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-07-19 09:52:02 +08:00
label = "TIMER_0";
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
};
timer1: timer@1000 {
compatible = "arm,cmsdk-timer";
reg = <0x1000 0x1000>;
interrupts = <4 3>;
boards/arm/mps2_an521: Add missing timer labels to dts The bindings for arm,cmsdk-{d}timer requires a label so add it into the dts since its missing on mps2_an521. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-07-19 09:52:02 +08:00
label = "TIMER_1";
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
};
dtimer0: dtimer@2000 {
compatible = "arm,cmsdk-dtimer";
reg = <0x2000 0x1000>;
interrupts = <5 3>;
boards/arm/mps2_an521: Add missing timer labels to dts The bindings for arm,cmsdk-{d}timer requires a label so add it into the dts since its missing on mps2_an521. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-07-19 09:52:02 +08:00
label = "DTIMER_0";
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
};
mhu0: mhu@3000 {
compatible = "arm,mhu";
reg = <0x3000 0x1000>;
interrupts = <6 3>;
label = "MHU_0";
};
mhu1: mhu@4000 {
compatible = "arm,mhu";
reg = <0x4000 0x1000>;
interrupts = <7 3>;
label = "MHU_1";
};
gpio0: gpio@100000 {
compatible = "arm,cmsdk-gpio";
reg = <0x100000 0x1000>;
interrupts = <68 3>;
gpio: arm: cmsdk-gpio: Fixup dts binding / nodes Add missing gpio-cells and gpio-controller properties to arm,cmsdk-gpio binding and dts nodes. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-08-09 22:41:58 +08:00
gpio-controller;
#gpio-cells = <2>;
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
};
gpio1: gpio@101000 {
compatible = "arm,cmsdk-gpio";
reg = <0x101000 0x1000>;
interrupts = <69 3>;
gpio: arm: cmsdk-gpio: Fixup dts binding / nodes Add missing gpio-cells and gpio-controller properties to arm,cmsdk-gpio binding and dts nodes. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-08-09 22:41:58 +08:00
gpio-controller;
#gpio-cells = <2>;
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
};
gpio2: gpio@102000 {
compatible = "arm,cmsdk-gpio";
reg = <0x102000 0x1000>;
interrupts = <70 3>;
gpio: arm: cmsdk-gpio: Fixup dts binding / nodes Add missing gpio-cells and gpio-controller properties to arm,cmsdk-gpio binding and dts nodes. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-08-09 22:41:58 +08:00
gpio-controller;
#gpio-cells = <2>;
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
};
gpio3: gpio@103000 {
compatible = "arm,cmsdk-gpio";
reg = <0x103000 0x1000>;
interrupts = <71 3>;
gpio: arm: cmsdk-gpio: Fixup dts binding / nodes Add missing gpio-cells and gpio-controller properties to arm,cmsdk-gpio binding and dts nodes. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-08-09 22:41:58 +08:00
gpio-controller;
#gpio-cells = <2>;
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
};
wdog0: wdog@81000 {
compatible = "arm,cmsdk-watchdog";
reg = <0x81000 0x1000>;
dts: Add information about system bus frequency to the dts This commit adds a fixed clock node (representing clock driving system bus). The added node is then referenced by peripherals requiring information about driving clock frequency. Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-06-21 20:49:23 +08:00
clocks = <&sysclk>;
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
};
uart0: uart@200000 {
compatible = "arm,cmsdk-uart";
reg = <0x200000 0x1000>;
interrupts = <33 3 32 3>;
interrupt-names = "tx", "rx";
dts: Add information about system bus frequency to the dts This commit adds a fixed clock node (representing clock driving system bus). The added node is then referenced by peripherals requiring information about driving clock frequency. Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-06-21 20:49:23 +08:00
clocks = <&sysclk>;
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
current-speed = <115200>;
label = "UART_0";
};
uart1: uart@201000 {
compatible = "arm,cmsdk-uart";
reg = <0x201000 0x1000>;
interrupts = <35 3 34 3>;
interrupt-names = "tx", "rx";
dts: Add information about system bus frequency to the dts This commit adds a fixed clock node (representing clock driving system bus). The added node is then referenced by peripherals requiring information about driving clock frequency. Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-06-21 20:49:23 +08:00
clocks = <&sysclk>;
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
current-speed = <115200>;
label = "UART_1";
};
uart2: uart@202000 {
compatible = "arm,cmsdk-uart";
reg = <0x202000 0x1000>;
interrupts = <37 3 36 3>;
interrupt-names = "tx", "rx";
dts: Add information about system bus frequency to the dts This commit adds a fixed clock node (representing clock driving system bus). The added node is then referenced by peripherals requiring information about driving clock frequency. Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-06-21 20:49:23 +08:00
clocks = <&sysclk>;
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
current-speed = <115200>;
label = "UART_2";
};
uart3: uart@203000 {
compatible = "arm,cmsdk-uart";
reg = <0x203000 0x1000>;
interrupts = <39 3 38 3>;
interrupt-names = "tx", "rx";
dts: Add information about system bus frequency to the dts This commit adds a fixed clock node (representing clock driving system bus). The added node is then referenced by peripherals requiring information about driving clock frequency. Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-06-21 20:49:23 +08:00
clocks = <&sysclk>;
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
current-speed = <115200>;
label = "UART_3";
};
uart4: uart@204000 {
compatible = "arm,cmsdk-uart";
reg = <0x204000 0x1000>;
interrupts = <41 3 40 3>;
interrupt-names = "tx", "rx";
dts: Add information about system bus frequency to the dts This commit adds a fixed clock node (representing clock driving system bus). The added node is then referenced by peripherals requiring information about driving clock frequency. Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-06-21 20:49:23 +08:00
clocks = <&sysclk>;
arm: mps_an521: Add support for the AN521 on MPS2+ The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem with SIE-200 and CMSDK components targeting the MPS2+ board. The SSE-200 subsystem implements two Cortex-M33 cores. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
2019-05-06 16:56:38 +08:00
current-speed = <115200>;
label = "UART_4";
};
i2c_touch: i2c@207000 {
compatible = "arm,versatile-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x207000 0x1000>;
label = "I2C_TOUCH";
};
i2c_audio_conf: i2c@208000 {
compatible = "arm,versatile-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x208000 0x1000>;
label = "I2C_AUDIO_CONF";
};
i2c_shield0: i2c@20c000 {
compatible = "arm,versatile-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x20c000 0x1000>;
label = "I2C_SHIELD0";
};
i2c_shield1: i2c@20d000 {
compatible = "arm,versatile-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x20d000 0x1000>;
label = "I2C_SHIELD1";
};