2019-04-06 21:08:09 +08:00
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/* SPDX-License-Identifier: Apache-2.0 */
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2017-04-28 02:25:20 +08:00
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#include <arm/armv7-m.dtsi>
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/ {
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cpus {
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2017-07-16 02:57:32 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2017-04-28 02:25:20 +08:00
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cpu@0 {
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2017-07-16 02:57:32 +08:00
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device_type = "cpu";
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2017-04-28 02:25:20 +08:00
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compatible = "arm,cortex-m3";
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2017-07-16 02:57:32 +08:00
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reg = <0>;
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2017-04-28 02:25:20 +08:00
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};
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};
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2017-07-21 20:43:01 +08:00
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sram0: memory@20000000 {
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2017-07-20 20:59:29 +08:00
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compatible = "mmio-sram";
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2017-04-28 02:25:20 +08:00
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reg = <0x20000000 (64*1024)>;
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};
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2019-06-21 20:49:23 +08:00
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sysclk: system-clock {
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compatible = "fixed-clock";
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clock-frequency = <12000000>;
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#clock-cells = <0>;
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};
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2017-04-28 02:25:20 +08:00
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soc {
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2020-04-09 14:45:11 +08:00
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flash-controller@400fd000 {
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compatible = "ti,stellaris-flash-controller";
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reg = <0x400fd000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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reg = <0x00000000 (256*1024)>;
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};
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};
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2018-11-09 19:53:08 +08:00
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uart0: uart@4000c000 {
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2017-04-29 00:34:06 +08:00
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compatible = "ti,stellaris-uart";
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2018-11-09 19:53:08 +08:00
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reg = <0x4000c000 0x4c>;
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2019-06-21 20:49:23 +08:00
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clocks = <&sysclk>;
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2017-04-29 00:34:06 +08:00
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interrupts = <5 3>;
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status = "disabled";
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};
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2018-11-09 19:53:08 +08:00
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uart1: uart@4000d000 {
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2017-04-29 00:34:06 +08:00
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compatible = "ti,stellaris-uart";
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2018-11-09 19:53:08 +08:00
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reg = <0x4000d000 0x4c>;
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2019-06-21 20:49:23 +08:00
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clocks = <&sysclk>;
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2017-04-29 00:34:06 +08:00
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interrupts = <6 3>;
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status = "disabled";
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};
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2018-11-09 19:53:08 +08:00
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uart2: uart@4000e000 {
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2017-04-29 00:34:06 +08:00
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compatible = "ti,stellaris-uart";
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2018-11-09 19:53:08 +08:00
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reg = <0x4000e000 0x4c>;
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2019-06-21 20:49:23 +08:00
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clocks = <&sysclk>;
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2017-04-29 00:34:06 +08:00
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interrupts = <33 3>;
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status = "disabled";
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};
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2018-09-19 17:53:59 +08:00
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eth: ethernet@40048000 {
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compatible = "ti,stellaris-ethernet";
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reg = <0x40048000 0x3c>;
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interrupts = <42 0>;
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status = "disabled";
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local-mac-address = [00 00 94 00 83 00];
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};
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2018-12-03 04:52:25 +08:00
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gpio0: gpio@40004000 {
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compatible = "ti,stellaris-gpio";
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reg = <0x40004000 0x1000>;
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interrupts = <0 3>;
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gpio-controller;
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#gpio-cells = <2>;
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2020-02-15 01:25:14 +08:00
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ngpios = <8>;
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2018-12-03 04:52:25 +08:00
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};
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gpio1: gpio@40005000 {
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compatible = "ti,stellaris-gpio";
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reg = <0x40005000 0x1000>;
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interrupts = <1 3>;
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gpio-controller;
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#gpio-cells = <2>;
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2020-02-15 01:25:14 +08:00
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ngpios = <8>;
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2018-12-03 04:52:25 +08:00
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};
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gpio2: gpio@40006000 {
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compatible = "ti,stellaris-gpio";
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reg = <0x40006000 0x1000>;
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interrupts = <2 3>;
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gpio-controller;
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#gpio-cells = <2>;
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2020-02-15 01:25:14 +08:00
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ngpios = <8>;
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2018-12-03 04:52:25 +08:00
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};
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gpio3: gpio@40007000 {
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compatible = "ti,stellaris-gpio";
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reg = <0x40007000 0x1000>;
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interrupts = <3 3>;
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gpio-controller;
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#gpio-cells = <2>;
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2020-02-15 01:25:14 +08:00
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ngpios = <8>;
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2018-12-03 04:52:25 +08:00
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};
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gpio4: gpio@40024000 {
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compatible = "ti,stellaris-gpio";
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reg = <0x40024000 0x1000>;
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interrupts = <4 3>;
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gpio-controller;
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#gpio-cells = <2>;
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2020-02-15 01:25:14 +08:00
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ngpios = <4>;
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2018-12-03 04:52:25 +08:00
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};
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gpio5: gpio@40025000 {
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compatible = "ti,stellaris-gpio";
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reg = <0x40025000 0x1000>;
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interrupts = <30 3>;
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gpio-controller;
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#gpio-cells = <2>;
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2020-02-15 01:25:14 +08:00
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ngpios = <4>;
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2018-12-03 04:52:25 +08:00
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};
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gpio6: gpio@40026000 {
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compatible = "ti,stellaris-gpio";
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reg = <0x40026000 0x1000>;
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interrupts = <31 3>;
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gpio-controller;
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#gpio-cells = <2>;
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2020-02-15 01:25:14 +08:00
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ngpios = <2>;
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2018-12-03 04:52:25 +08:00
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};
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2017-04-28 02:25:20 +08:00
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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