2018-06-14 02:04:43 +08:00
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/* SoC level DTS fixup file */
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2018-06-19 03:49:58 +08:00
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40011000_BASE_ADDRESS
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#define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40011000_CURRENT_SPEED
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#define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40011000_IRQ_0_PRIORITY
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#define CONFIG_UART_STM32_USART_1_NAME ST_STM32_USART_40011000_LABEL
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#define USART_1_IRQ ST_STM32_USART_40011000_IRQ_0
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#define CONFIG_UART_STM32_USART_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
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#define CONFIG_UART_STM32_USART_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED
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#define CONFIG_UART_STM32_USART_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
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#define CONFIG_UART_STM32_USART_2_NAME ST_STM32_USART_40004400_LABEL
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#define USART_2_IRQ ST_STM32_USART_40004400_IRQ_0
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#define CONFIG_UART_STM32_USART_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS
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#define CONFIG_UART_STM32_USART_3_BAUD_RATE ST_STM32_USART_40004800_CURRENT_SPEED
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#define CONFIG_UART_STM32_USART_3_IRQ_PRI ST_STM32_USART_40004800_IRQ_0_PRIORITY
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#define CONFIG_UART_STM32_USART_3_NAME ST_STM32_USART_40004800_LABEL
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#define USART_3_IRQ ST_STM32_USART_40004800_IRQ_0
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#define CONFIG_UART_STM32_USART_4_BASE_ADDRESS ST_STM32_USART_40004C00_BASE_ADDRESS
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#define CONFIG_UART_STM32_USART_4_BAUD_RATE ST_STM32_USART_40004C00_CURRENT_SPEED
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#define CONFIG_UART_STM32_USART_4_IRQ_PRI ST_STM32_USART_40004C00_IRQ_0_PRIORITY
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#define CONFIG_UART_STM32_USART_4_NAME ST_STM32_USART_40004C00_LABEL
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#define USART_4_IRQ ST_STM32_USART_40004C00_IRQ_0
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#define CONFIG_UART_STM32_USART_5_BASE_ADDRESS ST_STM32_USART_40005000_BASE_ADDRESS
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#define CONFIG_UART_STM32_USART_5_BAUD_RATE ST_STM32_USART_40005000_CURRENT_SPEED
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#define CONFIG_UART_STM32_USART_5_IRQ_PRI ST_STM32_USART_40005000_IRQ_0_PRIORITY
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#define CONFIG_UART_STM32_USART_5_NAME ST_STM32_USART_40005000_LABEL
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#define USART_5_IRQ ST_STM32_USART_40005000_IRQ_0
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#define CONFIG_UART_STM32_USART_6_BASE_ADDRESS ST_STM32_USART_40011400_BASE_ADDRESS
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#define CONFIG_UART_STM32_USART_6_BAUD_RATE ST_STM32_USART_40011400_CURRENT_SPEED
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#define CONFIG_UART_STM32_USART_6_IRQ_PRI ST_STM32_USART_40011400_IRQ_0_PRIORITY
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#define CONFIG_UART_STM32_USART_6_NAME ST_STM32_USART_40011400_LABEL
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#define USART_6_IRQ ST_STM32_USART_40011400_IRQ_0
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#define CONFIG_UART_STM32_USART_7_BASE_ADDRESS ST_STM32_USART_40007800_BASE_ADDRESS
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#define CONFIG_UART_STM32_USART_7_BAUD_RATE ST_STM32_USART_40007800_CURRENT_SPEED
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#define CONFIG_UART_STM32_USART_7_IRQ_PRI ST_STM32_USART_40007800_IRQ_0_PRIORITY
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#define CONFIG_UART_STM32_USART_7_NAME ST_STM32_USART_40007800_LABEL
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#define USART_7_IRQ ST_STM32_USART_40007800_IRQ_0
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#define CONFIG_UART_STM32_USART_8_BASE_ADDRESS ST_STM32_USART_40007C00_BASE_ADDRESS
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#define CONFIG_UART_STM32_USART_8_BAUD_RATE ST_STM32_USART_40007C00_CURRENT_SPEED
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#define CONFIG_UART_STM32_USART_8_IRQ_PRI ST_STM32_USART_40007C00_IRQ_0_PRIORITY
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#define CONFIG_UART_STM32_USART_8_NAME ST_STM32_USART_40007800_LABEL
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#define USART_8_IRQ ST_STM32_USART_40007C00_IRQ_0
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2018-06-14 02:04:43 +08:00
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2018-07-04 22:51:13 +08:00
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#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS
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#define CONFIG_I2C_1_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
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#define CONFIG_I2C_1_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
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#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL
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#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V2_40005400_IRQ_EVENT
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#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V2_40005400_IRQ_ERROR
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#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
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#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
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#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
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#define CONFIG_I2C_2_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
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#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL
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#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V2_40005800_IRQ_EVENT
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#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V2_40005800_IRQ_ERROR
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#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
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#define CONFIG_I2C_3_BASE_ADDRESS ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
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#define CONFIG_I2C_3_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
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#define CONFIG_I2C_3_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
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#define CONFIG_I2C_3_NAME ST_STM32_I2C_V2_40005C00_LABEL
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#define CONFIG_I2C_3_EVENT_IRQ ST_STM32_I2C_V2_40005C00_IRQ_EVENT
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#define CONFIG_I2C_3_ERROR_IRQ ST_STM32_I2C_V2_40005C00_IRQ_ERROR
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#define CONFIG_I2C_3_BITRATE ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
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2018-07-07 22:42:10 +08:00
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#ifdef ST_STM32_OTGFS_50000000_BASE_ADDRESS
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2018-07-02 00:27:18 +08:00
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#define CONFIG_USB_BASE_ADDRESS ST_STM32_OTGFS_50000000_BASE_ADDRESS
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#define CONFIG_USB_IRQ ST_STM32_OTGFS_50000000_IRQ_OTGFS
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#define CONFIG_USB_IRQ_PRI ST_STM32_OTGFS_50000000_IRQ_OTGFS_PRIORITY
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#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
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#define CONFIG_USB_RAM_SIZE ST_STM32_OTGFS_50000000_RAM_SIZE
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2018-07-07 22:42:10 +08:00
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#endif /* ST_STM32_OTGFS_50000000_BASE_ADDRESS */
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#ifdef ST_STM32_OTGHS_40040000_BASE_ADDRESS
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#define CONFIG_USB_HS_BASE_ADDRESS ST_STM32_OTGHS_40040000_BASE_ADDRESS
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#define CONFIG_USB_IRQ ST_STM32_OTGHS_40040000_IRQ_OTGHS
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#define CONFIG_USB_IRQ_PRI ST_STM32_OTGHS_40040000_IRQ_OTGHS_PRIORITY
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#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_OTGHS_40040000_NUM_BIDIR_ENDPOINTS
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#define CONFIG_USB_RAM_SIZE ST_STM32_OTGHS_40040000_RAM_SIZE
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#endif /* ST_STM32_OTGHS_40040000_BASE_ADDRESS */
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2018-07-02 00:27:18 +08:00
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2018-06-14 02:04:43 +08:00
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/* End of SoC Level DTS fixup file */
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