2020-11-24 14:14:08 +08:00
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/*
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* Copyright (c) 2021 Arm Limited (or its affiliates). All rights reserved.
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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2022-05-02 23:08:04 +08:00
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#include <arm64/fvp/fvp-aemv8r.dtsi>
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2020-11-24 14:14:08 +08:00
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/ {
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model = "FVP BaseR AEMv8R";
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chosen {
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/*
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* The SRAM node is actually located in the
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* DRAM region of the FVP BaseR AEMv8R.
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*/
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zephyr,sram = &dram0;
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zephyr,flash = &flash0;
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zephyr,console = &uart0;
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zephyr,shell-uart = &uart0;
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};
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2021-06-28 16:15:48 +08:00
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psci {
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compatible = "arm,psci-0.2";
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method = "hvc";
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};
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2020-11-24 14:14:08 +08:00
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soc {
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2022-03-15 18:37:43 +08:00
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flash0: flash@88000000 {
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2020-11-24 14:14:08 +08:00
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compatible = "soc-nv-flash";
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2022-03-15 18:37:43 +08:00
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reg = <0x88000000 DT_SIZE_M(64)>;
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2020-11-24 14:14:08 +08:00
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};
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2022-03-15 18:37:43 +08:00
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dram0: memory@0 {
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2020-11-24 14:14:08 +08:00
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compatible = "mmio-dram";
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2022-03-15 18:37:43 +08:00
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reg = <0x0 DT_SIZE_M(128)>;
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2020-11-24 14:14:08 +08:00
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};
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};
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};
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&uart0 {
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status = "okay";
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current-speed = <115200>;
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};
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2022-04-20 11:31:03 +08:00
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&uart1 {
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status = "okay";
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current-speed = <115200>;
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};
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