2015-12-13 21:34:48 +08:00
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# Kconfig - Quark X1000 SoC configuration options
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2015-09-20 11:49:34 +08:00
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#
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# Copyright (c) 2014-2015 Wind River Systems, Inc.
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2016-03-26 05:30:50 +08:00
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# Copyright (c) 2015-2016 Intel Corporation
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2015-09-20 11:49:34 +08:00
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#
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2015-10-07 00:00:37 +08:00
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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2015-09-20 11:49:34 +08:00
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#
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2015-10-07 00:00:37 +08:00
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# http://www.apache.org/licenses/LICENSE-2.0
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2015-09-20 11:49:34 +08:00
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#
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2015-10-07 00:00:37 +08:00
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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2015-09-20 11:49:34 +08:00
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#
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2015-12-17 21:54:35 +08:00
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if SOC_QUARK_X1000
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2016-03-26 05:30:50 +08:00
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2015-12-17 21:54:35 +08:00
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config SOC
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2015-12-13 21:34:48 +08:00
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default quark_x1000
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2015-09-20 11:49:34 +08:00
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config PHYS_LOAD_ADDR
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default 0x00100000
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2015-11-22 12:21:16 +08:00
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config PHYS_RAM_ADDR
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default 0x00400000
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2015-10-15 03:46:41 +08:00
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config RAM_SIZE
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2015-11-22 12:15:45 +08:00
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default 32768
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2015-10-15 03:46:41 +08:00
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config ROM_SIZE
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2015-11-22 12:15:45 +08:00
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default 1024 if XIP
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2015-10-15 03:46:41 +08:00
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2015-09-20 11:49:34 +08:00
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 25000000 if HPET_TIMER
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2016-03-01 00:12:40 +08:00
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config CLFLUSH_DETECT
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def_bool y if CACHE_FLUSHING
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2015-10-02 01:17:45 +08:00
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2015-09-29 06:16:34 +08:00
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if SHARED_IRQ
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2016-03-26 05:30:50 +08:00
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2015-09-29 06:16:34 +08:00
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config SHARED_IRQ_0
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def_bool y
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2016-03-26 05:30:50 +08:00
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if SHARED_IRQ_0
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2015-09-29 06:16:34 +08:00
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config SHARED_IRQ_0_NAME
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default "SHARED_IRQ0"
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config SHARED_IRQ_0_IRQ
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default 18
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config SHARED_IRQ_0_PRI
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2015-10-15 03:20:27 +08:00
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default 2
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2016-03-26 05:30:50 +08:00
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endif # SHARED_IRQ_0
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endif # SHARED_IRQ
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2015-09-29 06:16:34 +08:00
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2015-09-24 05:03:52 +08:00
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if PCI_LEGACY_BRIDGE
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2016-03-26 05:30:50 +08:00
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2015-09-24 05:03:52 +08:00
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config PCI_LEGACY_BRIDGE_BUS
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default 0
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config PCI_LEGACY_BRIDGE_DEV
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default 31
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config PCI_LEGACY_BRIDGE_VENDOR_ID
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default 0x8086
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config PCI_LEGACY_BRIDGE_DEVICE_ID
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default 0x095e
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2016-03-26 05:30:50 +08:00
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endif # PCI_LEGACY_BRIDGE
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2015-09-24 05:03:52 +08:00
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2015-09-26 06:30:22 +08:00
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if I2C
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2016-03-26 05:30:50 +08:00
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2015-09-30 02:22:23 +08:00
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config I2C_CLOCK_SPEED
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default 25
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2016-03-26 05:30:50 +08:00
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2015-09-26 06:30:22 +08:00
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config I2C_DW
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def_bool y
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2016-03-26 05:30:50 +08:00
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if I2C_DW
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2015-09-26 06:30:22 +08:00
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config I2C_DW_0
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def_bool y
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2016-03-26 05:30:50 +08:00
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if I2C_DW_0
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2015-09-26 06:30:22 +08:00
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config I2C_DW_0_NAME
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2016-04-23 23:06:05 +08:00
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default "I2C_0"
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2015-09-30 02:22:23 +08:00
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config I2C_DW_0_DEFAULT_CFG
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default 0x12
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2016-03-29 05:58:58 +08:00
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config I2C_DW_0_IRQ_PRI
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2015-10-15 03:20:27 +08:00
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default 2
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2015-09-29 06:16:34 +08:00
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config I2C_DW_0_IRQ_SHARED_NAME
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2015-10-02 01:17:45 +08:00
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default SHARED_IRQ_0_NAME if SHARED_IRQ
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2016-03-26 05:30:50 +08:00
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endif # I2C_DW_0
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endif # I2C_DW
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endif # I2C
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2015-09-26 06:30:22 +08:00
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2015-09-21 02:26:41 +08:00
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if GPIO
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2015-10-02 01:17:45 +08:00
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2015-11-11 18:45:39 +08:00
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config GPIO_SCH
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2015-10-02 01:17:45 +08:00
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def_bool y
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2016-03-26 05:30:50 +08:00
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if GPIO_SCH
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2015-11-11 18:45:39 +08:00
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config GPIO_SCH_0
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2015-10-02 01:17:45 +08:00
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def_bool y
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2016-03-26 05:30:50 +08:00
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config GPIO_SCH_1
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2015-10-02 01:17:45 +08:00
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def_bool y
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2015-11-11 18:45:39 +08:00
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if GPIO_SCH_0
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2016-03-26 05:30:50 +08:00
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2015-11-11 18:45:39 +08:00
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config GPIO_SCH_0_DEV_NAME
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default "GPIO_CW"
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2016-03-26 05:30:50 +08:00
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endif # GPIO_SCH_0
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2015-11-11 18:45:39 +08:00
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if GPIO_SCH_1
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2016-03-26 05:30:50 +08:00
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2015-11-11 18:45:39 +08:00
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config GPIO_SCH_1_DEV_NAME
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default "GPIO_RW"
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2016-03-26 05:30:50 +08:00
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endif # GPIO_SCH_1
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endif # GPIO_SCH
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config GPIO_DW
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def_bool y
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2015-10-02 01:17:45 +08:00
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2015-10-01 18:20:01 +08:00
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if GPIO_DW
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2016-03-26 05:30:50 +08:00
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2015-10-01 18:20:01 +08:00
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config GPIO_DW_0
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def_bool y
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2015-10-03 22:14:34 +08:00
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select GPIO_DW_0_IRQ_SHARED if SHARED_IRQ
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2016-03-26 05:30:50 +08:00
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if GPIO_DW_0
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2015-10-02 01:17:45 +08:00
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config GPIO_DW_0_NAME
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default "GPIO_0"
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2015-10-01 18:20:01 +08:00
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config GPIO_DW_0_PRI
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2015-10-15 03:20:27 +08:00
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default 2
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2015-10-01 18:20:01 +08:00
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config GPIO_DW_0_IRQ_SHARED_NAME
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default SHARED_IRQ_0_NAME if SHARED_IRQ
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2016-03-26 05:30:50 +08:00
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endif # GPIO_DW_0
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endif # GPIO_DW
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endif # GPIO
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2015-09-26 06:30:22 +08:00
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2015-09-30 19:53:03 +08:00
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2015-10-12 19:39:43 +08:00
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if SPI
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2016-03-26 05:30:50 +08:00
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2015-10-12 19:39:43 +08:00
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config SPI_INTEL
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def_bool y
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2016-03-26 05:30:50 +08:00
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if SPI_INTEL
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2015-10-15 18:01:03 +08:00
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config SPI_INTEL_CS_GPIO
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def_bool y
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2015-10-03 22:14:34 +08:00
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2015-10-12 19:39:43 +08:00
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config SPI_INTEL_PORT_0
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def_bool y
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2016-03-26 05:30:50 +08:00
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if SPI_INTEL_PORT_0
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2015-10-12 19:39:43 +08:00
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config SPI_INTEL_PORT_0_DRV_NAME
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default "SPI0"
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2015-09-30 19:53:03 +08:00
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config SPI_INTEL_PORT_0_BUS
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default 0
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config SPI_INTEL_PORT_0_DEV
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default 21
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config SPI_INTEL_PORT_0_FUNCTION
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default 0
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config SPI_INTEL_PORT_0_REGS
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default 0x90009000
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config SPI_INTEL_PORT_0_IRQ
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default 16
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config SPI_INTEL_PORT_0_PRI
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2015-10-15 03:20:27 +08:00
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default 2
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2015-09-30 19:53:03 +08:00
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config SPI_INTEL_PORT_0_CS_GPIO_PORT
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default GPIO_DW_0_NAME
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config SPI_INTEL_PORT_0_CS_GPIO_PIN
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default 0
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2015-10-12 19:39:43 +08:00
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2016-03-26 05:30:50 +08:00
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endif # SPI_INTEL_PORT_0
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2015-10-12 19:39:43 +08:00
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config SPI_INTEL_PORT_1
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2015-10-14 05:15:01 +08:00
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def_bool n
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2016-03-26 05:30:50 +08:00
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if SPI_INTEL_PORT_1
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2015-10-12 19:39:43 +08:00
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config SPI_INTEL_PORT_1_DRV_NAME
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default "SPI1"
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2015-09-30 19:53:03 +08:00
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config SPI_INTEL_PORT_1_BUS
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default 0
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config SPI_INTEL_PORT_1_DEV
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default 21
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config SPI_INTEL_PORT_1_FUNCTION
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default 1
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2015-10-09 17:58:12 +08:00
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config SPI_INTEL_PORT_1_REGS
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2015-09-30 19:53:03 +08:00
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default 0x90008000
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2015-10-09 17:58:12 +08:00
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config SPI_INTEL_PORT_1_IRQ
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2015-09-30 19:53:03 +08:00
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default 17
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2015-10-09 17:58:12 +08:00
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config SPI_INTEL_PORT_1_PRI
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2015-10-15 03:20:27 +08:00
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default 2
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2015-10-15 18:01:03 +08:00
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config SPI_INTEL_PORT_1_CS_GPIO_PORT
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default GPIO_DW_0_NAME
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config SPI_INTEL_PORT_1_CS_GPIO_PIN
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default 2
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2016-03-26 05:30:50 +08:00
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endif # SPI_INTEL_PORT_1
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endif # SPI_INTEL
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2015-10-12 19:39:43 +08:00
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endif # SPI
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2015-10-02 19:09:41 +08:00
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2015-12-02 00:42:19 +08:00
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if UART_NS16550
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config UART_NS16550_PCI
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2016-03-26 05:30:50 +08:00
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def_bool y if PCI
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2015-12-02 00:42:19 +08:00
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config UART_NS16550_PORT_0
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def_bool y
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if UART_NS16550_PORT_0
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config UART_NS16550_PORT_0_NAME
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default "UART_0"
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config UART_NS16550_PORT_0_IRQ_PRI
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default 0
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config UART_NS16550_PORT_0_BAUD_RATE
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default 115200
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config UART_NS16550_PORT_0_OPTIONS
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default 0
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config UART_NS16550_PORT_0_PCI
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def_bool y if UART_NS16550_PCI
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endif # UART_NS16550_PORT_0
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config UART_NS16550_PORT_1
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2016-03-26 05:30:50 +08:00
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def_bool y if PCI
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2015-12-02 00:42:19 +08:00
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if UART_NS16550_PORT_1
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config UART_NS16550_PORT_1_NAME
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default "UART_1"
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config UART_NS16550_PORT_1_IRQ_PRI
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default 3
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config UART_NS16550_PORT_1_BAUD_RATE
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default 115200
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config UART_NS16550_PORT_1_OPTIONS
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default 0
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config UART_NS16550_PORT_1_PCI
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def_bool y if UART_NS16550_PCI
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endif # UART_NS16550_PORT_1
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endif # UART_NS16550
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2015-10-12 19:31:45 +08:00
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2015-10-15 12:49:56 +08:00
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if ETH_DW
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2016-03-26 05:30:50 +08:00
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2015-10-15 12:49:56 +08:00
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config ETH_DW_0
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def_bool y
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2016-03-26 05:30:50 +08:00
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if ETH_DW_0
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2015-10-15 12:49:56 +08:00
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config ETH_DW_0_IRQ_SHARED_NAME
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default SHARED_IRQ_0_NAME if SHARED_IRQ
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2016-03-26 05:30:50 +08:00
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endif # ETH_DW_0
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endif # ETH_DW
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2015-10-27 03:56:02 +08:00
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# Pin multiplexer uses PCAL9535A, needs to be initialized after it
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config PINMUX_INIT_PRIORITY
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2016-03-26 05:54:32 +08:00
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default 80 if PINMUX
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2015-10-27 03:56:02 +08:00
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2015-12-02 00:42:20 +08:00
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if UART_CONSOLE
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config UART_CONSOLE_ON_DEV_NAME
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default "UART_1"
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endif
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2015-12-02 00:42:20 +08:00
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if BLUETOOTH_UART
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config BLUETOOTH_UART_ON_DEV_NAME
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default "UART_1"
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endif
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2015-12-17 21:54:35 +08:00
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endif # SOC_QUARK_X1000
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