2019-11-01 20:45:29 +08:00
|
|
|
# Apollo Lake SoC configuration options
|
|
|
|
|
2019-01-30 11:34:41 +08:00
|
|
|
# Copyright (c) 2018-2019 Intel Corporation
|
2018-07-17 09:37:14 +08:00
|
|
|
# Copyright (c) 2014-2015 Wind River Systems, Inc.
|
|
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
|
|
|
|
if SOC_APOLLO_LAKE
|
|
|
|
|
|
|
|
config SOC
|
|
|
|
default "apollo_lake"
|
|
|
|
|
|
|
|
config SYS_CLOCK_HW_CYCLES_PER_SEC
|
2019-09-17 01:50:56 +08:00
|
|
|
default 19200000
|
|
|
|
|
2020-05-15 02:03:53 +08:00
|
|
|
config HPET_TIMER
|
|
|
|
default y
|
|
|
|
|
|
|
|
config APIC_TIMER
|
|
|
|
default y if !HPET_TIMER
|
|
|
|
|
2020-06-13 22:39:58 +08:00
|
|
|
config PCIE_MMIO_CFG
|
|
|
|
default y
|
|
|
|
|
2019-09-17 01:50:56 +08:00
|
|
|
if APIC_TIMER
|
|
|
|
|
|
|
|
config APIC_TIMER_IRQ
|
|
|
|
default 24
|
|
|
|
|
|
|
|
config APIC_TIMER_TSC
|
|
|
|
default y
|
|
|
|
|
|
|
|
if APIC_TIMER_TSC
|
|
|
|
|
|
|
|
config APIC_TIMER_TSC_M
|
|
|
|
default 3
|
|
|
|
|
|
|
|
config APIC_TIMER_TSC_N
|
|
|
|
default 249
|
|
|
|
|
|
|
|
endif # APIC_TIMER_TSC
|
|
|
|
|
|
|
|
endif # APIC_TIMER
|
2018-07-17 09:37:14 +08:00
|
|
|
|
|
|
|
config CLFLUSH_DETECT
|
2018-11-14 00:15:49 +08:00
|
|
|
default y if CACHE_FLUSHING
|
2018-07-17 09:37:14 +08:00
|
|
|
|
2019-05-17 09:09:37 +08:00
|
|
|
config X86_DYNAMIC_IRQ_STUBS
|
|
|
|
default 16
|
2020-02-10 11:18:50 +08:00
|
|
|
depends on DYNAMIC_INTERRUPTS
|
2019-05-24 05:02:49 +08:00
|
|
|
|
|
|
|
config I2C_DW
|
|
|
|
default y
|
2020-02-10 11:18:50 +08:00
|
|
|
depends on I2C
|
2018-09-20 01:15:12 +08:00
|
|
|
|
|
|
|
config GPIO_INTEL_APL
|
2018-11-14 00:15:49 +08:00
|
|
|
default y
|
2020-02-10 11:18:50 +08:00
|
|
|
depends on GPIO
|
2018-09-20 01:15:12 +08:00
|
|
|
|
2018-07-17 09:37:14 +08:00
|
|
|
endif # SOC_APOLLO_LAKE
|