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zephyr/soc/x86/apollo_lake/Kconfig.defconfig

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arch/x86/soc: add SoC configuration for Apollo Lake This adds the SoC configuration for Apollo Lake. This is based on the Atom configuration. Origin: Original Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-17 09:37:14 +08:00
#
# Kconfig - Apollo Lake SoC configuration options
#
# Copyright (c) 2018 Intel Corporation
# Copyright (c) 2014-2015 Wind River Systems, Inc.
#
# SPDX-License-Identifier: Apache-2.0
#
if SOC_APOLLO_LAKE
config SOC
default "apollo_lake"
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 150000000 if LOAPIC_TIMER
default 25000000 if HPET_TIMER
config CLFLUSH_DETECT
def_bool y if CACHE_FLUSHING
if UART_NS16550
config UART_NS16550_PCI
arch/x86: apollo_lake: add PCI related bits for UARTs/I2Cs This adds PCI related configuration for UARTs and I2C controllers to the Apollo Lake SoC configuration to support PCI devices. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-17 03:36:05 +08:00
def_bool y if PCI
arch/x86/soc: add SoC configuration for Apollo Lake This adds the SoC configuration for Apollo Lake. This is based on the Atom configuration. Origin: Original Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-17 09:37:14 +08:00
config UART_NS16550_PORT_0
def_bool y
if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_OPTIONS
default 0
arch/x86: apollo_lake: add PCI related bits for UARTs/I2Cs This adds PCI related configuration for UARTs and I2C controllers to the Apollo Lake SoC configuration to support PCI devices. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-17 03:36:05 +08:00
config UART_NS16550_PORT_0_PCI
def_bool y if PCI
arch/x86/soc: add SoC configuration for Apollo Lake This adds the SoC configuration for Apollo Lake. This is based on the Atom configuration. Origin: Original Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-17 09:37:14 +08:00
endif # UART_NS16550_PORT_0
config UART_NS16550_PORT_1
def_bool y
if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_OPTIONS
default 0
arch/x86: apollo_lake: add PCI related bits for UARTs/I2Cs This adds PCI related configuration for UARTs and I2C controllers to the Apollo Lake SoC configuration to support PCI devices. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-17 03:36:05 +08:00
config UART_NS16550_PORT_1_PCI
def_bool y if PCI
arch/x86/soc: add SoC configuration for Apollo Lake This adds the SoC configuration for Apollo Lake. This is based on the Atom configuration. Origin: Original Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-17 09:37:14 +08:00
endif # UART_NS16550_PORT_1
arch/x86: apollo_lake: add PCI related bits for UARTs/I2Cs This adds PCI related configuration for UARTs and I2C controllers to the Apollo Lake SoC configuration to support PCI devices. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-17 03:36:05 +08:00
if UART_NS16550_PORT_2
config UART_NS16550_PORT_2_OPTIONS
default 0
config UART_NS16550_PORT_2_PCI
def_bool y if PCI
endif # UART_NS16550_PORT_2
if UART_NS16550_PORT_3
config UART_NS16550_PORT_3_OPTIONS
default 0
config UART_NS16550_PORT_3_PCI
def_bool y if PCI
endif # UART_NS16550_PORT_3
arch/x86/soc: add SoC configuration for Apollo Lake This adds the SoC configuration for Apollo Lake. This is based on the Atom configuration. Origin: Original Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-17 09:37:14 +08:00
endif # UART_NS16550
endif # SOC_APOLLO_LAKE