2015-07-21 23:12:17 +08:00
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ccflags-y +=-I$(srctree)/drivers
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2015-10-16 01:54:35 +08:00
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obj-$(CONFIG_GPIO_DW) += gpio_dw.o
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obj-$(CONFIG_GPIO_PCAL9535A) += gpio_pcal9535a.o
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2015-11-11 18:43:15 +08:00
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obj-$(CONFIG_GPIO_SCH) += gpio_sch.o
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2015-11-27 21:24:36 +08:00
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obj-$(CONFIG_GPIO_QMSI) += gpio_qmsi.o
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2016-04-19 09:17:22 +08:00
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obj-$(CONFIG_GPIO_QMSI_SS) += gpio_qmsi_ss.o
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2016-01-30 05:51:57 +08:00
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obj-$(CONFIG_GPIO_ATMEL_SAM3) += gpio_atmel_sam3.o
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2016-12-13 00:50:56 +08:00
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obj-$(CONFIG_GPIO_MCUX) += gpio_mcux.o
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gpio: Add gpio_mmio32 driver to access basic 32-bit i/o registers
It is envisaged that this will be used by SoC or board code to make
available fixed purpose memory-mapped i/o registers to the rest of the
system which normally expects to use GPIO devices, e.g. for driving chip
select lines, LEDs or reading button states.
As such, the driver code doesn't provide a kconfig based configuration
mechanism, instead SoC/board code can hard-wire the devices it wants
with something simple like:
GPIO_MMIO32_INIT(misc_reg1, "MISC1", 0x12345678, 0xffffffffu)
Then, for example, if bit N of the register at 0x12345678 is wired up as
an SPI device chip select line, the SPI driver could be configured to
use pin N of the "MISC1" GPIO driver and not need any other board
specific code.
Change-Id: Ib02fcbab73fcf9637e25834db060fb3108626f47
Signed-off-by: Jon Medhurst <tixy@linaro.org>
2016-12-21 00:55:41 +08:00
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obj-$(CONFIG_GPIO_MMIO32) += gpio_mmio32.o
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2016-03-03 22:33:26 +08:00
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obj-$(CONFIG_GPIO_STM32) += gpio_stm32.o
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2016-05-18 22:49:04 +08:00
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obj-$(CONFIG_GPIO_NRF5) += gpio_nrf5.o
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2016-09-12 22:55:40 +08:00
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obj-$(CONFIG_GPIO_CMSDK_AHB) += gpio_cmsdk_ahb.o
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2016-11-24 07:47:20 +08:00
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obj-$(CONFIG_GPIO_CC32XX) += gpio_cc32xx.o
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2017-01-11 07:24:30 +08:00
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obj-$(CONFIG_GPIO_PULPINO) += gpio_pulpino.o
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2017-03-15 05:16:43 +08:00
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obj-$(CONFIG_GPIO_FE310) += gpio_fe310.o
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