/**
@page PWR_STOP_RTC Power Stop Mode Example
@verbatim
******************************************************************************
* @file PWR/PWR_STOP_RTC/readme.txt
* @author MCD Application Team
* @brief Description of the Power Stop Mode using RTC example.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@endverbatim
@par Example Description
How to enter the Stop mode and wake up from this mode by using the RTC wakeup
timer event connected to an interrupt.
This event is connected to EXTI_Line22.
LED1 is ON during RUN mode and OFF during STOP mode.
In the associated software
- the system clock is set to 216 MHz.
- the Low Speed Internal (LSI) clock is used as RTC clock source by default.
- the EXTI_Line22 connected internally to the RTC Wakeup event is configured
to generate an interrupt on rising edge each 20s.
- the SysTick is programmed to generate an interrupt each 1 ms.
LED1 is ON. The system enters STOP mode after 5s and will wait for the RTC Wakeup event to be
generated each 20s, LED1 is OFF.
After the system woken up from STOP, the clock system is reconfigured because the default clock
after wake up is the LSI.
The above scenario is repeated in an infinite loop.
- STOP Mode with RTC clocked by LSI
===================================
- RTC Clocked by LSI
- Regulator in LP mode
- VREFINT OFF with fast wakeup enabled
- LSI as SysClk after Wake Up
- No IWDG
- Automatic Wakeup using RTC on LSI (after ~20s)
@note This example can not be used in DEBUG mode, this is due to the fact
that the Cortex-M7 core is no longer clocked during low power mode
so debugging features are disabled.
@note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select
the RTC clock source; in this case the Backup domain will be reset in
order to modify the RTC Clock source, as consequence RTC registers (including
the backup registers) and RCC_CSR register are set to their reset values.
@note Care must be taken when using HAL_Delay(), this function provides accurate delay (in milliseconds)
based on variable incremented in SysTick ISR. This implies that if HAL_Delay() is called from
a peripheral ISR process, then the SysTick interrupt must have higher priority (numerically lower)
than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
@note The application need to ensure that the SysTick time base is always set to 1 millisecond
to have correct HAL operation.
@par Keywords
Power, PWR, Stop mode, Interrupt, EXTI, Wakeup, Low Power, RTC, External reset, LSI,
@Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
<20><><A0><A0><A0>then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
<0A><><A0><A0><A0><A0>The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
<0A><><A0><A0><A0> It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
<0A><><A0><A0><A0><A0>In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
<0A><><A0><A0><A0><A0>Even though the user must manage the cache coherence for read accesses.
<0A><><A0><A0><A0><A0>Please refer to the AN4838 <20>Managing memory protection unit (MPU) in STM32 MCUs<55>
<0A><><A0><A0><A0><A0>Please refer to the AN4839 <20>Level 1 cache on STM32F7 Series<65>
@par Directory contents
- PWR/PWR_STOP_RTC/Inc/stm32f7xx_conf.h HAL Configuration file
- PWR/PWR_STOP_RTC/Inc/stm32f7xx_it.h Header for stm32f7xx_it.c
- PWR/PWR_STOP_RTC/Inc/main.h Header file for main.c
- PWR/PWR_STOP_RTC/Src/system_stm32f7xx.c STM32F7xx system clock configuration file
- PWR/PWR_STOP_RTC/Src/stm32f7xx_it.c Interrupt handlers
- PWR/PWR_STOP_RTC/Src/main.c Main program
- PWR/PWR_STOP_RTC/Src/stm32f7xx_hal_msp.c HAL MSP module
@par Hardware and Software environment
- This example runs on STM32F769xx/STM32F779xx/STM32F777xx/STM32F767xx devices
- This example has been tested with STMicroelectronics STM32F769I-EVAL
evaluation board and can be easily tailored to any other supported device
and development board.
- STM32F769I-EVAL Set-up :
- None
@par How to use it ?
In order to make the program work, you must do the following :
- Open your preferred toolchain
- Rebuild all files and load your image into target memory
- Run the example
*/
767d083e20