/**
@page CEC CEC_DataExchange example
@verbatim
******************************************************************************
* @file CEC/CEC_DataExchange/readme.txt
* @author MCD Application Team
* @brief Description of the CEC Data Exchangeexample.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@endverbatim
@par Example Description
How to configure and use the CEC peripheral to receive and transmit messages.
- Hardware Description
To use this example, two STM32F769I-EVAL boards (called Device_1 and
Device_2) are loaded with the same software then connected through CEC lines
/|\ In the firmware file main.h, uncomment the dedicated line to use
/_!_\ the CEC peripheral as STM32 device_1 or STM32 device_2.
@verbatim
*------------------------------------------------------------------------------*
| STM32F769I_EVAL STM32F769I_EVAL |
| Device Address :0x01 Device Address :0x03 |
| ____________________ ____________________ |
| | | | | |
| | | | | |
| | __________ | | __________ | |
| | | CEC |____|____CECLine______|____| CEC | | |
| | | Device_1 | | | | Device_2 | | |
| | |__________| | | |__________| | |
| | | | | |
| | O LD1 | | O LD1 | |
| | O LD2 Joystick | | O LD2 Joystick | |
| | O LD3 _ | | O LD3 _ | |
| | O LD4 |_| | | O LD4 |_| | |
| | | | | |
| | GND O--|-----------------|--O GND | |
| |____________________| |____________________| |
| |
| |
*------------------------------------------------------------------------------**
@endverbatim
- Software Description
The test unrolls as follows.
On TX side, four possible messages can be transmitted and are indicated as
below on the transmitting board:
- when Tamper push-button is pressed, LED1 toggles
- when Joystick Selection push-button is pressed, LED2 toggles
- when Joystick UP push-button is pressed, LED3 toggles
- when Joystick DOWN push-button is pressed, LED4 toggles
Accordingly, the following happens on the RX side in case of successful
reception:
- when Tamper push-button is pressed on TX side,
* all RX side LEDs are turned off
- when Joystick Selection push-button is pressed on TX side, on RX side
* LED1 and LED2 are turned on
* LED3 and LED4 are turned off
- when Joystick UP push-button is pressed on TX side,
* all RX side LEDs are turned on
- when Joystick DOWN push-button is pressed on TX side, on RX side
* LED1 and LED2 are turned off
* LED3 and LED4 are turned on
In case of unsuccessful reception, LED3 is turned on.
Practically, 2 EXTI lines (EXTI15_10 and EXTI9_5) are configured to
generate an interrupt on each falling or rising edge.
A specific message is then transmitted by the CEC IP
and a LED connected to a specific MFX GPIO pin is toggled.
- EXTI9_5 is mapped to MFX used to manage Joystick pins
- EXTI15_10 is mapped to PC.13
Then, on TX side,
- when rising edge is detected on EXTI9_5-SEL joystick button, LED2 toggles
- when falling edge is detected on EXTI15_10 and EXTI line interrupt is detected
on PC.13, LED1 toggles
- when falling edge is detected on EXTI9_5-UP joystick button, LED3 toggles
- when falling edge is detected on EXTI9_5-DOWN joystick button LED4 toggles
In this example, HCLK is configured at 216 MHz.
@par Keywords
Connectivity, CEC, Transmission, Reception, Joystick, Data exchange
@Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
<20><><A0><A0><A0>then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
<0A><><A0><A0><A0><A0>The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
<0A><><A0><A0><A0> It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
<0A><><A0><A0><A0><A0>In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
<0A><><A0><A0><A0><A0>Even though the user must manage the cache coherence for read accesses.
<0A><><A0><A0><A0><A0>Please refer to the AN4838 <20>Managing memory protection unit (MPU) in STM32 MCUs<55>
<0A><><A0><A0><A0><A0>Please refer to the AN4839 <20>Level 1 cache on STM32F7 Series<65>
@par Directory contents
- CEC/CEC_DataExchange/Inc/stm32f7xx_hal_conf.h HAL configuration file
- CEC/CEC_DataExchange/Inc/stm32f7xx_it.h Interrupt handlers header file
- CEC/CEC_DataExchange/Inc/main.h Header for main.c module
- CEC/CEC_DataExchange/Src/stm32f7xx_it.c Interrupt handlers
- CEC/CEC_DataExchange/Src/system_stm32f7xx.c STM32F7xx system source file
- CEC/CEC_DataExchange/Src/main.c Main program
- CEC/CEC_DataExchange/Src/stm32f7xx_hal_msp.c IP hardware resources initialization
@par Hardware and Software environment
- This example runs on STM32F769xx/STM32F779xx/STM32F777xx/STM32F767xx Devices.
- This example has been tested with STM32F769I-EVAL board and can be
easily tailored to any other supported device and development board.
- STM32F769I-EVAL revB Set-up
- Connect PB6 of Board1 to PB6 of Board2.
- Connect GND between two Boards.
@par How to use it ?
In order to make the program work, you must do the following :
- Open your preferred toolchain
- in main.h, uncomment DEVICE_1 for first board, uncomment DEVICE_2 for second board
- Rebuild all files and load your image into target memory
- With a wire, connect GPIOB-GPIO_PIN_6 between the 2 boards
- Connect the ground of the 2 boards
- Run the example
*/
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