98 lines
4.5 KiB
Plaintext
98 lines
4.5 KiB
Plaintext
/**
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@page LPTIM_Timeout LPTIM Timeout example with LSE clock source
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@verbatim
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******************************************************************************
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* @file LPTIM/LPTIM_Timeout/readme.txt
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* @author MCD Application Team
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* @brief Description of the LPTIM Timeout example.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@endverbatim
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@par Example Description
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How to implement, through the HAL LPTIM API, a timeout with the LPTIMER peripheral, to wake up
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the system from a low-power mode.
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The main() function configures the LPTIMER and goes in STOP mode.
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In order to start the timer a first trigger is needed on (PG.14)(LPTIM_ETR).
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Any successive trigger event on (PG.14) will reset the counter and the timer
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will restart. The timeout value corresponds to the compare value (32768).
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If after the first trigger no other trigger occurs within the expected time frame,
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the MCU is woken-up by the compare match event and LED2 turns on.
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In this example the LPTIM is clocked by the LSI
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Timeout = (Compare + 1) / LPTIM_Clock
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= (32767 + 1) / LSI_Clock_Frequency
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Once the system is woken up it remains in run mode. The led keeps toggling each time the timer expires.
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@note Care must be taken when using HAL_Delay(), this function provides accurate
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delay (in milliseconds) based on variable incremented in SysTick ISR. This
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implies that if HAL_Delay() is called from a peripheral ISR process, then
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the SysTick interrupt must have higher priority (numerically lower)
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than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
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To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
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@note The application need to ensure that the SysTick time base is always set to 1 millisecond
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to have correct HAL operation.
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@par Keywords
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Timer, Low Power Timer, Wake up, Stop mode, LSI, Run mode,
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@Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
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<20><><EFBFBD><EFBFBD><EFBFBD>then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
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@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Even though the user must manage the cache coherence for read accesses.
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Please refer to the AN4838 <20>Managing memory protection unit (MPU) in STM32 MCUs<55>
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Please refer to the AN4839 <20>Level 1 cache on STM32F7 Series<65>
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@par Directory contents
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- LPTIM/LPTIM_Timeout/Inc/stm32f7xx_hal_conf.h HAL configuration file
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- LPTIM/LPTIM_Timeout/Inc/stm32f7xx_it.h Interrupt handlers header file
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- LPTIM/LPTIM_Timeout/Inc/main.h Header for main.c module
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- LPTIM/LPTIM_Timeout/Src/stm32f7xx_it.c Interrupt handlers
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- LPTIM/LPTIM_Timeout/Src/main.c Main program
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- LPTIM/LPTIM_Timeout/Src/stm32f7xx_hal_msp.c HAL MSP module
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- LPTIM/LPTIM_Timeout/Src/system_stm32f7xx.c STM32F7xx system source file
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@par Hardware and Software environment
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- This example runs on STM32F722xx/STM32F723xx/STM32F732xx/STM32F733xx devices.
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- This example has been tested with STMicroelectronics STM32F722ZE-Nucleo
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board and can be easily tailored to any other supported device
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and development board.
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- Connect an external trigger (ETR) to PG.14(pin 14 in CN10 connector ).
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If the trigger is higher then 1Hz, the counter is regularly reset, the system stays in STOP mode.
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If the trigger is lower then 1Hz, the counter expires and the system is woken up.
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@par How to use it ?
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In order to make the program work, you must do the following :
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- Open your preferred tool chain
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- Rebuild all files and load your image into target memory
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- Run the example
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*/
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