/**
@page LPTIM_Timeout LPTIM Timeout example with LSE clock source
@verbatim
******************************************************************************
* @file LPTIM/LPTIM_Timeout/readme.txt
* @author MCD Application Team
* @brief Description of the LPTIM Timeout example.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@endverbatim
@par Example Description
How to implement, through the HAL LPTIM API, a timeout with the LPTIMER peripheral, to wake up
the system from a low-power mode.
The main() function configures the LPTIMER and goes in STOP mode.
In order to start the timer a first trigger is needed on (PG.14)(LPTIM_ETR).
Any successive trigger event on (PG.14) will reset the counter and the timer
will restart. The timeout value corresponds to the compare value (32768).
If after the first trigger no other trigger occurs within the expected time frame,
the MCU is woken-up by the compare match event and LED2 turns on.
In this example the LPTIM is clocked by the LSI
Timeout = (Compare + 1) / LPTIM_Clock
= (32767 + 1) / LSI_Clock_Frequency
Once the system is woken up it remains in run mode. The led keeps toggling each time the timer expires.
@note Care must be taken when using HAL_Delay(), this function provides accurate
delay (in milliseconds) based on variable incremented in SysTick ISR. This
implies that if HAL_Delay() is called from a peripheral ISR process, then
the SysTick interrupt must have higher priority (numerically lower)
than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
To change the SysTick interrupt priority you have to use HAL_NVIC_SetPriority() function.
@note The application need to ensure that the SysTick time base is always set to 1 millisecond
to have correct HAL operation.
@par Keywords
Timer, Low Power Timer, Wake up, Stop mode, LSI, Run mode,
@Note<74>If the user code size exceeds the DTCM-RAM size or starts from internal cacheable memories (SRAM1 and SRAM2),that is shared between several processors,
<20><><A0><A0><A0>then it is highly recommended to enable the CPU cache and maintain its coherence at application level.
<0A><><A0><A0><A0><A0>The address and the size of cacheable buffers (shared between CPU and other masters) must be properly updated to be aligned to cache line size (32 bytes).
@Note It is recommended to enable the cache and maintain its coherence, but depending on the use case
<0A><><A0><A0><A0> It is also possible to configure the MPU as "Write through", to guarantee the write access coherence.
<0A><><A0><A0><A0><A0>In that case, the MPU must be configured as Cacheable/Bufferable/Not Shareable.
<0A><><A0><A0><A0><A0>Even though the user must manage the cache coherence for read accesses.
<0A><><A0><A0><A0><A0>Please refer to the AN4838 <20>Managing memory protection unit (MPU) in STM32 MCUs<55>
<0A><><A0><A0><A0><A0>Please refer to the AN4839 <20>Level 1 cache on STM32F7 Series<65>
@par Directory contents
- LPTIM/LPTIM_Timeout/Inc/stm32f7xx_hal_conf.h HAL configuration file
- LPTIM/LPTIM_Timeout/Inc/stm32f7xx_it.h Interrupt handlers header file
- LPTIM/LPTIM_Timeout/Inc/main.h Header for main.c module
- LPTIM/LPTIM_Timeout/Src/stm32f7xx_it.c Interrupt handlers
- LPTIM/LPTIM_Timeout/Src/main.c Main program
- LPTIM/LPTIM_Timeout/Src/stm32f7xx_hal_msp.c HAL MSP module
- LPTIM/LPTIM_Timeout/Src/system_stm32f7xx.c STM32F7xx system source file
@par Hardware and Software environment
- This example runs on STM32F722xx/STM32F723xx/STM32F732xx/STM32F733xx devices.
- This example has been tested with STMicroelectronics STM32F722ZE-Nucleo
board and can be easily tailored to any other supported device
and development board.
- Connect an external trigger (ETR) to PG.14(pin 14 in CN10 connector ).
If the trigger is higher then 1Hz, the counter is regularly reset, the system stays in STOP mode.
If the trigger is lower then 1Hz, the counter expires and the system is woken up.
@par How to use it ?
In order to make the program work, you must do the following :
- Open your preferred tool chain
- Rebuild all files and load your image into target memory
- Run the example
*/
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