Rationale:
- MW libraries subject to click-thru have been already removed from this repo, but not the projects using them.
- Building these projects, whether manually or automatically via some ACI tool would yield errors.
- Particularly with daily (or nightly) builds in the frame of a CI/CD strategy, such errors would pollute the logs uselessly.
Note: If needed, the removed items can be found in the full firmware package on st.com. Please refer to the README.md file for further details.
For parts like the STM32F1 Connectivity Line (STM32F105xx, STM32F107xx),
it is occasionally necessary to source SYSCLK via PLL2. This patch will
add this support.
- Add: `UTILS_GetPLL2OutputFrequency()` to calculate the output frequency of PLL2
- Add: `LL_PLL_ConfigSystemClock_PLL2()` to configure the system clock as sourced from HSE, via PLL2 and PLL1.
- Add: Miscellaneous support definitions.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Rania JMAI