so the lower half driver don't need include the specific board.h
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I2ff5c30049a5c5e8ee90baea56e9f4cb1a8a4f87
The ability to locate data and code in different sections
is becomming critical and common place in cores with multiple
bus matrices and power domains, where DMA can be limited to
a specific memory.
stm32_i2sdev_initialize to stm32_i2sbus_initiliaze, to be consistent
with the way other buses are initialized.
The stm32_i2sdev_initiliaze (similar to stm32_spidev_initialize for
example) is a board specific function that does any necessary
initialization that's board depedent.
utilize the call inside nxtask_exit instead, also move
nxsched_suspend_scheduler to nxtask_exit for symmetry
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I219fc15faf0026e452b0db3906aa40b40ac677f3
Note that iswalnum etc functions defined in wctype.h, and cwchar uses them.
So include wctype.h to fix libcxx build break.
Change-Id: I0f6b402d817f0927729800bdb8b9fce15e76ec3d
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
This file is already included by most board's Makefile,
remove it to avoid override the board's specific CFLAGS
etc.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This backs out a part of PR 1179 which has a very serious error: If C buffered I/O is available, then printf() and vprintf MUST use it. Otherwise, the ordering of the I/O will be screwed up. They must not use direct file descriptor I/O UNLESS C buffered I/O is disabled.
This fixes the following 3 issues:
1. Wait for send to complete in exchange
Before shutting down the SPI, we have to wait for send to complete; not only
DMA, since DMA just puts data to the SPI fifo. It is not yet out of SPI.
When doing exchange with both send & receive this is not an issue because when
receive dma has completed, it is certain that also the send is.
This can be accomplished by completing the transfer in SPI TXC interrupt
instead of DMA callback.
2. Fix TXDMAEN and RXDMAEN placement
According to the spec, the RXDMAEN must be enabled before
enabling DMA requests for Tx and Rx in DMA registers, and TXDMAEN
after that.
Cleaner place to do this is in spi_dmarxstart and spi_dmatxstart, where
also the dma requests are enabled. This also handles properly the
simplex modes.
3. Remove bus signal glitches when shutting off SPI block
Use AFCNTR to avoid glitches in SPI lines while turning SPI block
on/off during calls to exchange.
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
Restore OUTPUT_FORMAT and OUTPUT_ARCH for mips link scripts to fix Nightly build break logs:
p32-ld: pic32mx_head.o: compiled for a little endian system and target is big endian
p32-ld: pic32mx_head.o: endianness incompatible with that of the selected emulation
p32-ld: failed to merge target specific data of file pic32mx_head.o
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
Xiang Xiao