Commit Graph

25818 Commits

Author SHA1 Message Date
Konstantin Berezenko 5c6cd17d46 Add support for SPI 4 and 5 on stm32f411 chips 2016-05-27 11:08:18 -07:00
Gregory Nutt 7d538d19bf Costmetic changes to comments and style 2016-05-27 10:53:27 -06:00
Gregory Nutt b4354cf130 Stefan Kolb's change to the SAMV7 Oneshot Timer (commit d44ecbcfbb) should also be applied to the SAMA5 oneshot time since the drivers are identical. Here are the commit commits from Stefan's original change:
"This is a fix to a problem in the handling of the oneshot timer. Due to a wrong assumption concerning the behavior directly after the start of the timer/counter the function sam_oneshot_cancel(…) calculates the wrong remaining time. The code assumes that the counter register is zero directly after the start of the timer, but this is not true. To start the time/counter a software trigger is invoked, this trigger starts the timer/count and sets the counter register to zero, but the reset of the counter register is not performed instantly. According to the datasheet: “The counter can be reset by a trigger. In this case, the counter value passes to zero on the next valid edge of the selected clock.” Thus the counter is set to zero between 0 and USEC_PER_TICK microseconds after the clock was started.

"In my fix I use the freerun count value to determine if at least one tick passed since the start of the timer and thus if the value of the oneshot counter is correct. I also tried to use the function up_timer_gettime(…) to achieve this but, at least if compiled with no optimization the problem vanishes without using the value of the function, the function call takes too long.

"Another problem treated in the fix is that if the oneshot timer/counter is canceled, we only know the remaining time with a precision of USEC_PER_TICK microseconds. This means the calculated remaining time is between 0 and USEC_PER_TICK microseconds  too long. To fix this I subtract one tick if the calculated remaining time is greater than one tick and otherwise set the remaining time to zero. By doing so the measured times are much more precise as without it."
2016-05-27 07:58:03 -06:00
Stefan Kolb d44ecbcfbb This is a fix to a problem in the handling of the oneshot timer. Due to a wrong assumption concerning the behavior directly after the start of the timer/counter the function sam_oneshot_cancel(…) calculates the wrong remaining time. The code assumes that the counter register is zero directly after the start of the timer, but this is not true. To start the time/counter a software trigger is invoked, this trigger starts the timer/count and sets the counter register to zero, but the reset of the counter register is not performed instantly. According to the datasheet: “The counter can be reset by a trigger. In this case, the counter value passes to zero on the next valid edge of the selected clock.” Thus the counter is set to zero between 0 and USEC_PER_TICK microseconds after the clock was started.
In my fix I use the freerun count value to determine if at least one tick passed since the start of the timer and thus if the value of the oneshot counter is correct. I also tried to use the function up_timer_gettime(…) to achieve this but, at least if compiled with no optimization the problem vanishes without using the value of the function, the function call takes too long.

Another problem treated in the fix is that if the oneshot timer/counter is canceled, we only know the remaining time with a precision of USEC_PER_TICK microseconds. This means the calculated remaining time is between 0 and USEC_PER_TICK microseconds  too long. To fix this I subtract one tick if the calculated remaining time is greater than one tick and otherwise set the remaining time to zero. By doing so the measured times are much more precise as without it.
2016-05-27 07:51:50 -06:00
Gregory Nutt 23f4f04448 Costmetic update to some comments 2016-05-27 07:50:06 -06:00
Pierre-noel Bouteville 55d704e3c2 ADC: In adc.h, exclude upper half fields if common upper half is not used (CONFIG_ADC not defined). 2016-05-27 07:16:30 -06:00
Pierre-noel Bouteville 41412d0ce9 * fix a bug in crc computation for ms583730
* implement POSIX read.
2016-05-27 07:05:20 -06:00
Gregory Nutt 3d3b7b5422 EFM32, STM32, TIVA: Allow lower half driver to build if any ADC is selected. Should not depend on CONFIG_ADC. 2016-05-27 06:46:33 -06:00
Gregory Nutt 3e7b2d617a All drivers that use SPI must call SPI_LOCK and SPI_UNLOCK. This is not optional. 2016-05-26 14:56:10 -06:00
Gregory Nutt d5a4f85893 ADS1255 Driver: Must also lock the SPI bus before using it. 2016-05-26 14:00:33 -06:00
Gregory Nutt d2caa93f1a ADS1255 Driver: Must not do SPI access from interrupt handler. Use the worker thread instead. 2016-05-26 13:44:11 -06:00
Gregory Nutt 1571575d54 Perhaps this is a little clearer 2016-05-26 13:44:10 -06:00
Gregory Nutt 5ea37bb139 Merged in paulpatience/nuttx/warnings (pull request #33)
Silence some warnings
2016-05-26 13:09:58 -06:00
Gregory Nutt 31ac3f5123 STM32 ADC: Missed on adc_receive 2016-05-26 12:42:34 -06:00
Gregory Nutt 01af4d1af1 Merge branch 'adcbind' 2016-05-26 12:40:17 -06:00
Gregory Nutt aa05767a00 Add ADC bind method to the Tiva ADC drivers 2016-05-26 12:39:22 -06:00
Gregory Nutt 8f2a660c8b Add ADC bind method to the STM32 ADC drivers 2016-05-26 12:25:54 -06:00
Gregory Nutt 2f5221ed91 Add ADC bind method to the LPC43xx and SAMA5Dx ADC drivers 2016-05-26 12:19:17 -06:00
Paul A. Patience f8f7b7582c Silence some warnings 2016-05-26 14:06:13 -04:00
Gregory Nutt 957634519d Missed a few adc_receive calls in the LPC17xx ADC driver. That design has several. 2016-05-26 12:04:17 -06:00
ziggurat29 4cc722aa1a Merged nuttx/nuttx into master 2016-05-26 12:57:31 -05:00
Gregory Nutt 9d6845b7ec Add ADC bind method to the EFM32 and LPC17xx ADC drivers 2016-05-26 11:57:18 -06:00
Gregory Nutt b630d48175 Add bind method to the ADC lower-half interface 2016-05-26 11:32:26 -06:00
Gregory Nutt b36d125e33 Merged in paulpatience/nuttx/libuavcan (pull request #31)
libuavcan: Forgot to change define
2016-05-26 09:52:34 -06:00
Gregory Nutt 001715d57b FS: Add logic to detach a file structure from a file descriptor. This is for use only within the OS. It permits an open file or driver to be used across multiple threads. 2016-05-26 09:41:50 -06:00
Paul A. Patience 5cc2fba418 libuavcan: Forgot to change define 2016-05-26 11:11:09 -04:00
Gregory Nutt aa7a981674 Update some comments 2016-05-26 08:37:40 -06:00
Gregory Nutt e57a6d14c3 lcd/Kconfig, Make.defs: Remove dependency of CONFIG_LCD_NXDRIVER for building non-graphic, SLCD drivers. 2016-05-26 07:21:14 -06:00
ziggurat29 e1a83fee3c Merged nuttx/nuttx into master 2016-05-25 19:28:35 -05:00
Gregory Nutt 783bab6c82 Costmetic changes from review of last PR 2016-05-25 18:04:39 -06:00
Gregory Nutt 0d2698a710 Merged in ziggurat29/nuttx/stm32l4_i2c_lcd_mjkdz_001 (pull request #30)
get I2C working for STM32L4
2016-05-25 17:58:19 -06:00
Gregory Nutt 3603dc6218 1-wire: Initialization/uninitialization functions are not use MCU-independent up_ naming. Should use STM32-specific stm32_ naming. These are not globally accessible but only accessible from STM32 board logic. 2016-05-25 17:56:47 -06:00
ziggurat29 003c2c737a get I2C working. some more work regarding clocking computation is needed, as is some inhertited 'todo's from the basis code. but it does work with the devices tested so far. 2016-05-25 18:43:37 -05:00
Gregory Nutt 1746e8aad3 SAM4E-EK: Fix dangle right comment introduced in recent commit 2016-05-25 15:29:32 -06:00
Gregory Nutt 7de267645e Merged in paulpatience/nuttx/stm32_can (pull request #29)
STM32 CAN: Add support for both RX FIFOs
2016-05-25 15:06:59 -06:00
Paul A. Patience d31aefe4ef STM32 CAN: Add support for both RX FIFOs 2016-05-25 16:11:18 -04:00
Gregory Nutt add152bf24 Update README 2016-05-25 14:07:59 -06:00
Sebastien Lorquet 880b59aa26 Additional configuration option to enable SST26 driver debug output. Using comming FS debug output generates too much output. 2016-05-25 13:43:44 -06:00
ziggurat29 b7935f5705 Merged nuttx/nuttx into master 2016-05-25 14:41:20 -05:00
Gregory Nutt 78e08bbeea Purely cosmetic change from review of last PR 2016-05-25 13:29:01 -06:00
Gregory Nutt fafc56ae80 Merged in ziggurat29/nuttx/stm32l4_i2c_lcd_mjkdz_001 (pull request #28)
complete logic in 'create stack' and 'use stack' to support stack coloration.  Fix some booboos breaking compatibility with TLS in libc.
2016-05-25 13:22:03 -06:00
Gregory Nutt 4afc4964ed SAM34 TWI: Missing semicolon 2016-05-25 13:05:03 -06:00
Gregory Nutt d89eefc6a5 Refresh all STM32 configurations 2016-05-25 12:39:28 -06:00
Gregory Nutt 4a63a7760a STM32: Hook 1-Wire driver into the build system 2016-05-25 12:31:32 -06:00
ziggurat29 397d228b2a let nucleo (stm32l4) support proc fs for info useful for debug 2016-05-25 13:11:43 -05:00
ziggurat29 0252909fc9 altered pin defs for I2C pins; these needed to be specified as open-drain (otherwise they are push-pull) 2016-05-25 13:09:52 -05:00
Gregory Nutt 9ec104834a Remove CONFIG_USARTn_ISUART 2016-05-25 11:21:48 -06:00
Gregory Nutt c089a2f241 Rename CONFIG_ARCH_HAVE_OTHER_UART to CONFIG_OTHER_UART_SERIALDRIVER 2016-05-25 10:48:33 -06:00
Gregory Nutt e2e6ce3f1b Rename CONFIG_ARCH_HAVE_SCIn to CONFIG_SCIn_SERIALDRIVER 2016-05-25 10:46:55 -06:00
Gregory Nutt 2a87741e72 Rename CONFIG_ARCH_HAVE_UARTn to CONFIG_UARTn_SERIALDRIVER 2016-05-25 10:45:01 -06:00