Gustavo Henrique Nihei
2d6cd7e580
xtensa/esp32s2: Fix the number of GPIO IRQs
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-06-30 00:10:41 +08:00
Gustavo Henrique Nihei
bd7ee0d675
xtensa/esp32s2: Sync IRQ management API with ESP32 and ESP32-S3
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-08 11:36:32 -03:00
zhuyanlin
bf40d70df9
xtensa:esp32s2: setup software interrupt as swi interrupt
...
Enable and setup software interrupt for esp32s2
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-24 00:06:43 +01:00
Petro Karashchenko
8d3bf05fd2
include: fix double include pre-processor guards
...
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-16 11:11:14 -03:00
Gustavo Henrique Nihei
80436dd7be
xtensa/esp32s2: Fix some wrong definitions related to IRQ management
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-12 21:28:40 +01:00
Gustavo Henrique Nihei
efca63e9e3
xtensa/esp32s2: Fix missing parenthesis on macro expression
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-11 23:21:13 +08:00
Abdelatif Guettouche
a7d8d9dd98
esp32s2/tie.h: Run the file though detab.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-14 07:39:54 -03:00
Abdelatif Guettouche
6d246eb18f
esp32s2/tie.h: The old tie.h file was from ESP32 which doesn't apply to
...
ESP32-S2. This commit gets the correct S2 tie.h file
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-14 07:39:54 -03:00
zhuyanlin
9ea7676731
arch:xtensa: rename XCHAL_INT_NLEVELS to XCHAL_NUM_INTLEVELS
...
The name used in Tensilica support file core-isa.h for all vendors is
`XCHAL_NUM_INTLEVELS`.
Use a new name may be confused by newer porting xtensa arch.
Change-Id: Ie108d3fdfcc02c81f0eacfca852a1cfc9eea17de
2021-08-28 21:51:45 +02:00
Alan C. Assis
929a4a7278
Fix dangling whitespace at the end of line
2021-06-01 07:49:54 +02:00
Alan C. Assis
06795a221a
Clean ESP32S2 Xtensa files
2021-06-01 07:49:54 +02:00
Abdelatif Guettouche
fccd5fbdd2
esp32s2_allocateheap.c: Use the address of the ROM data from the ROM linker script.
2021-06-01 07:49:54 +02:00
Alan C. Assis
7767acd24a
Add initial ESP32S2 Xtensa support
2021-06-01 07:49:54 +02:00