Fix Kconfig style
Remove spaces from Kconfig files Remove TABs Add comments
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@ -2613,7 +2613,7 @@ config IMXRT_SRAM_HEAPOFFSET
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Used to reserve memory at the beginning of SRAM for, as an example,
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a framebuffer.
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endmenu # i.MX RT Heap Configuration
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endmenu # i.MX RT Heap Configuration
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config IMXRT_FLEXRAM_PARTITION
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bool "Set FlexRAM Paritioning"
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@ -1108,16 +1108,16 @@ choice
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default SAMA5D2_CLASSD_PWM_TRAILING
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---help---
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TRAILING EDGE: The signal is single-ended.
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If bit NON_OVERLAP is cleared, the signal is sent to
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If bit NON_OVERLAP is cleared, the signal is sent to
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CLASSD_L0 and CLASSD_R0.
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If bit NON_OVERLAP is set, the signal is sent to
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CLASSD_L0/L1 and CLASSD_R0/R1.
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UNIFORM: The signal is differential.
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If bit NON_OVERLAP is cleared, the signal is sent to
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If bit NON_OVERLAP is cleared, the signal is sent to
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CLASSD_L0/L2 and CLASSD_R0/R2.
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If bit NON_OVERLAP is set, the signal is sent to
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If bit NON_OVERLAP is set, the signal is sent to
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CLASSD_L0/L1/L2/L3 and CLASSD_R0/R1/R2/R3.
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config SAMA5D2_CLASSD_PWM_TRAILING
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@ -1245,8 +1245,8 @@ config SAMA5D2_CLASSD_MONO
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default 0
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---help---
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Disabled. The signal is sent stereo to the left and right channels.
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Enabled. The same signal is sent on both left and right channels.
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The sent signal is defined by the MONOMODE field value.
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Enabled. The same signal is sent on both left and right channels.
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The sent signal is defined by the MONOMODE field value.
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choice
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prompt "Mono Mode Selection (MONOMODE)"
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@ -328,7 +328,7 @@ config ARCH_CHIP_RISCV_CUSTOM
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---help---
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Select this option if there is no directory for the chip under arch/risc-v/src/.
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endchoice
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endchoice # RISC-V chip selection
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config ARCH_RV32
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bool
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@ -389,35 +389,35 @@ config ARCH_RV_ISA_VENDOR_EXTENSIONS
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config ARCH_RV_MMIO_BITS
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int
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# special cases
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default 32 if ARCH_CHIP_K230
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default 32 if ARCH_CHIP_K230
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# general fallbacks
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default 32 if ARCH_RV32
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default 64 if ARCH_RV64
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default 32 if ARCH_RV32
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default 64 if ARCH_RV64
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config ARCH_FAMILY
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string
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default "rv32" if ARCH_RV32
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default "rv64" if ARCH_RV64
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default "rv32" if ARCH_RV32
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default "rv64" if ARCH_RV64
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config ARCH_CHIP
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string
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default "fe310" if ARCH_CHIP_FE310
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default "k210" if ARCH_CHIP_K210
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default "litex" if ARCH_CHIP_LITEX
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default "bl602" if ARCH_CHIP_BL602
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default "esp32c3-legacy" if ARCH_CHIP_ESP32C3
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default "esp32c3" if ARCH_CHIP_ESP32C3_GENERIC
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default "esp32c6" if ARCH_CHIP_ESP32C6
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default "esp32h2" if ARCH_CHIP_ESP32H2
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default "c906" if ARCH_CHIP_C906
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default "mpfs" if ARCH_CHIP_MPFS
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default "rv32m1" if ARCH_CHIP_RV32M1
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default "qemu-rv" if ARCH_CHIP_QEMU_RV
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default "hpm6000" if ARCH_CHIP_HPM6000
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default "hpm6750" if ARCH_CHIP_HPM6750
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default "jh7110" if ARCH_CHIP_JH7110
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default "bl808" if ARCH_CHIP_BL808
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default "k230" if ARCH_CHIP_K230
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default "fe310" if ARCH_CHIP_FE310
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default "k210" if ARCH_CHIP_K210
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default "litex" if ARCH_CHIP_LITEX
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default "bl602" if ARCH_CHIP_BL602
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default "esp32c3-legacy" if ARCH_CHIP_ESP32C3
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default "esp32c3" if ARCH_CHIP_ESP32C3_GENERIC
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default "esp32c6" if ARCH_CHIP_ESP32C6
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default "esp32h2" if ARCH_CHIP_ESP32H2
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default "c906" if ARCH_CHIP_C906
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default "mpfs" if ARCH_CHIP_MPFS
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default "rv32m1" if ARCH_CHIP_RV32M1
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default "qemu-rv" if ARCH_CHIP_QEMU_RV
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default "hpm6000" if ARCH_CHIP_HPM6000
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default "hpm6750" if ARCH_CHIP_HPM6750
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default "jh7110" if ARCH_CHIP_JH7110
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default "bl808" if ARCH_CHIP_BL808
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default "k230" if ARCH_CHIP_K230
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config ARCH_RISCV_INTXCPT_EXTENSIONS
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bool "RISC-V Integer Context Extensions"
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@ -498,7 +498,7 @@ config RISCV_TOOLCHAIN_GNU_RV32
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This option should work for any modern GNU toolchain (GCC 5.2 or newer)
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configured for riscv32-unknown-elf.
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endchoice
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endchoice # Toolchain Selection
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config RISCV_SEMIHOSTING_HOSTFS
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bool "Semihosting HostFS"
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@ -517,7 +517,7 @@ config RISCV_SEMIHOSTING_HOSTFS_CACHE_COHERENCE
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---help---
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Flush & Invalidte cache before & after bkpt instruction.
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endif
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endif # RISCV_SEMIHOSTING_HOSTFS
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if ARCH_CHIP_LITEX
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@ -538,9 +538,9 @@ config LITEX_CORE_VEXRISCV_SMP
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select ARCH_HAVE_S_MODE
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select ARCH_HAVE_ELF_EXECUTABLE
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endchoice
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endchoice # LITEX Core Selection
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endif
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endif # ARCH_CHIP_LITEX
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source "arch/risc-v/src/opensbi/Kconfig"
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source "arch/risc-v/src/nuttsbi/Kconfig"
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@ -596,4 +596,4 @@ endif
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if ARCH_CHIP_K230
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source "arch/risc-v/src/k230/Kconfig"
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endif
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endif
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endif # ARCH_RISCV
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@ -107,8 +107,8 @@ config MULTBOOT2_FB_TERM
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bool "Multiboot2 framebuffer terminal"
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default n
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depends on NXFONTS
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---help---
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Enable a framebuffer terminal for early debug printing
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---help---
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Enable a framebuffer terminal for early debug printing
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endif # ARCH_MULTIBOOT2
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@ -1884,10 +1884,10 @@ config ESP32S3_SPI_FLASH_SUPPORT_PSRAM_STACK
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can do SPI Flash read/write/erase/map/unmap. Otherwise,
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it may cause exception, the root cause is as following:
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1. When operating SPI flash, cache is also disable,
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then software can't access PSRAM by data cache.
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then software can't access PSRAM by data cache.
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2. SPI flash read/write/erase functions have instruction like
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stack-pop and stack-push which may use stack buffer which is
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PSRAM space or load/store temp variables which locate in PSRAM space too.
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PSRAM space or load/store temp variables which locate in PSRAM space too.
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3. Once operation in step 2 triggers, CPU will trigger exception.
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So related SPI flash functions should be sent and run in tasks which use SRAM as task stack.
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@ -3174,7 +3174,7 @@ config ARCH_BOARD
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default "esp32s3-box" if ARCH_BOARD_ESP32S3_BOX
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default "esp32c6-devkitc" if ARCH_BOARD_ESP32C6_DEVKITC
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default "esp32c6-devkitm" if ARCH_BOARD_ESP32C6_DEVKITM
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default "esp32h2-devkit" if ARCH_BOARD_ESP32H2_DEVKIT
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default "esp32h2-devkit" if ARCH_BOARD_ESP32H2_DEVKIT
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default "et-stm32-stamp" if ARCH_BOARD_ET_STM32_STAMP
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default "tlsr8278adk80d" if ARCH_BOARD_TLSR8278ADK80D
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default "ez80f910200kitg" if ARCH_BOARD_EZ80F910200KITG
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@ -3443,7 +3443,7 @@ config ARCH_BOARD
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default "xx3803" if ARCH_BOARD_XX3803
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default "xx3823" if ARCH_BOARD_XX3823
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default "s698pm-dkit" if ARCH_BOARD_S698PM_DKIT
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default "hpm6360evk" if ARCH_BOARD_HPM6360EVK
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default "hpm6360evk" if ARCH_BOARD_HPM6360EVK
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default "hpm6750evk2" if ARCH_BOARD_HPM6750EVK2
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default "at32f437-mini" if ARCH_BOARD_AT32F437_MINI
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@ -496,7 +496,7 @@ config AT24XX_FREQUENCY
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int "AT24xx I2C bus frequency"
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default 100000
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---help---
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Set the I2C frequency to use when accessing the AT24CXX EEPROM.
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Set the I2C frequency to use when accessing the AT24CXX EEPROM.
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This value must represent a valid I2C speed (normally less than
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400.000) or the driver might fail.
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@ -509,7 +509,7 @@ config MTD_AT25EE
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select MTD_BYTE_WRITE
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---help---
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Build support for SPI-based AT25xx type EEPROMs. MTD on EEPROM can
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perform poorly, so it is possible only usable if the EEPROM has a
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perform poorly, so it is possible only usable if the EEPROM has a
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clock speed 10MHz or higher. EEPROMs that use the same commands as
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the 25AA160 should work OK.
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@ -525,7 +525,7 @@ choice
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pages so that the file system block size is, say, 128, 256 or
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512 bytes.
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In any event, the block size *must* be an even multiple of the
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In any event, the block size *must* be an even multiple of the
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number of pages and, often, needs to be a factor 2.
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This is up to the user to check!
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