arch/arm/src/armv7-a/sctlr.h: Add SCR bit definitions.
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@ -167,7 +167,19 @@
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/* TODO: To be provided */
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/* Secure Configuration Register (SCR) */
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/* TODO: To be provided */
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#define SCR_NS (1 << 0) /* Bit 0: Non-secure */
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#define SCR_IRQ (1 << 1) /* Bit 1: IRQs taken in Monitor mode */
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#define SCR_FIQ (1 << 2) /* Bit 2: FIQs taken in Monitor mode */
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#define SCR_EA (1 << 3) /* Bit 3: External aborts taken in Monitor mode */
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#define SCR_FW (1 << 4) /* Bit 4: F bit writable */
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#define SCR_AW (1 << 5) /* Bit 5: A bit writable */
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#define SCR_NET (1 << 6) /* Bit 6: Not Early Termination */
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#define SCR_SCD (1 << 7) /* Bit 7: Secure Monitor Call disable */
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#define SCR_HCE (1 << 8) /* Bit 8: Hyp Call enable */
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#define SCR_SIF (1 << 9) /* Bit 9: Secure state instruction fetches from
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* Non-secure memory are not permitted */
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/* Bits 10-31: Reserved */
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/* Secure Debug Enable Register (SDER) */
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/* TODO: To be provided */
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