esp32(s3)_start.c: In SMP mode, don't disable APP CPU at startup. It starts in a
disabled state and if OpenOCD is used this will clear OpenOCD configuration. Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
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@ -137,7 +137,6 @@ uint32_t g_idlestack[IDLETHREAD_STACKWORDS]
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static noreturn_function void __esp32_start(void)
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{
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uint32_t regval;
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uint32_t sp;
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/* Make sure that normal interrupts are disabled. This is really only an
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@ -169,11 +168,15 @@ static noreturn_function void __esp32_start(void)
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memset(&_sbss, 0, (&_ebss - &_sbss) * sizeof(_sbss));
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#ifndef CONFIG_SMP
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uint32_t regval;
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/* Make sure that the APP_CPU is disabled for now */
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regval = getreg32(DPORT_APPCPU_CTRL_B_REG);
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regval &= ~DPORT_APPCPU_CLKGATE_EN;
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putreg32(regval, DPORT_APPCPU_CTRL_B_REG);
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#endif
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/* The 2nd stage bootloader enables RTC WDT to check on startup sequence
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* related issues in application. Hence disable that as we are about to
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@ -183,6 +183,7 @@ static void IRAM_ATTR configure_cpu_caches(void)
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*
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****************************************************************************/
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#ifndef CONFIG_SMP
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static void IRAM_ATTR disable_app_cpu(void)
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{
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uint32_t regval;
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@ -204,6 +205,7 @@ static void IRAM_ATTR disable_app_cpu(void)
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regval &= ~SYSTEM_CONTROL_CORE_1_RESETING;
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putreg32(regval, SYSTEM_CORE_1_CONTROL_0_REG);
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}
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#endif
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/****************************************************************************
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* Name: __esp32s3_start
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@ -257,9 +259,11 @@ void noreturn_function IRAM_ATTR __esp32s3_start(void)
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*dest = 0;
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}
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#ifndef CONFIG_SMP
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/* Make sure that the APP_CPU is disabled for now */
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disable_app_cpu();
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#endif
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/* The 2nd stage bootloader enables RTC WDT to check on startup sequence
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* related issues in application. Hence disable that as we are about to
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