From 5085f854d0f0fff5672e2c0673407b6313e8f2fe Mon Sep 17 00:00:00 2001 From: Abdelatif Guettouche Date: Tue, 15 Mar 2022 14:38:25 +0100 Subject: [PATCH] esp32(s3)_start.c: In SMP mode, don't disable APP CPU at startup. It starts in a disabled state and if OpenOCD is used this will clear OpenOCD configuration. Signed-off-by: Abdelatif Guettouche --- arch/xtensa/src/esp32/esp32_start.c | 5 ++++- arch/xtensa/src/esp32s3/esp32s3_start.c | 4 ++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/xtensa/src/esp32/esp32_start.c b/arch/xtensa/src/esp32/esp32_start.c index 00fd8eb379..fab28e26a6 100644 --- a/arch/xtensa/src/esp32/esp32_start.c +++ b/arch/xtensa/src/esp32/esp32_start.c @@ -137,7 +137,6 @@ uint32_t g_idlestack[IDLETHREAD_STACKWORDS] static noreturn_function void __esp32_start(void) { - uint32_t regval; uint32_t sp; /* Make sure that normal interrupts are disabled. This is really only an @@ -169,11 +168,15 @@ static noreturn_function void __esp32_start(void) memset(&_sbss, 0, (&_ebss - &_sbss) * sizeof(_sbss)); +#ifndef CONFIG_SMP + uint32_t regval; + /* Make sure that the APP_CPU is disabled for now */ regval = getreg32(DPORT_APPCPU_CTRL_B_REG); regval &= ~DPORT_APPCPU_CLKGATE_EN; putreg32(regval, DPORT_APPCPU_CTRL_B_REG); +#endif /* The 2nd stage bootloader enables RTC WDT to check on startup sequence * related issues in application. Hence disable that as we are about to diff --git a/arch/xtensa/src/esp32s3/esp32s3_start.c b/arch/xtensa/src/esp32s3/esp32s3_start.c index 0e43d14bcf..384629b178 100644 --- a/arch/xtensa/src/esp32s3/esp32s3_start.c +++ b/arch/xtensa/src/esp32s3/esp32s3_start.c @@ -183,6 +183,7 @@ static void IRAM_ATTR configure_cpu_caches(void) * ****************************************************************************/ +#ifndef CONFIG_SMP static void IRAM_ATTR disable_app_cpu(void) { uint32_t regval; @@ -204,6 +205,7 @@ static void IRAM_ATTR disable_app_cpu(void) regval &= ~SYSTEM_CONTROL_CORE_1_RESETING; putreg32(regval, SYSTEM_CORE_1_CONTROL_0_REG); } +#endif /**************************************************************************** * Name: __esp32s3_start @@ -257,9 +259,11 @@ void noreturn_function IRAM_ATTR __esp32s3_start(void) *dest = 0; } +#ifndef CONFIG_SMP /* Make sure that the APP_CPU is disabled for now */ disable_app_cpu(); +#endif /* The 2nd stage bootloader enables RTC WDT to check on startup sequence * related issues in application. Hence disable that as we are about to