ARMv7-A/i.MX6 SMP: Move SMP coherernt cache setup to earlier in initialization of CPUn, n>0
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@ -47,7 +47,6 @@
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#include "up_internal.h"
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#include "up_internal.h"
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#include "cp15_cacheops.h"
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#include "cp15_cacheops.h"
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#include "gic.h"
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#include "gic.h"
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#include "scu.h"
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#include "sched/sched.h"
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#include "sched/sched.h"
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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@ -110,10 +109,6 @@ int arm_start_handler(int irq, FAR void *context)
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sinfo("CPU%d Started\n", cpu);
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sinfo("CPU%d Started\n", cpu);
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/* Enable SMP cache coherency for the CPU */
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arm_enable_smp(cpu);
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/* Reset scheduler parameters */
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/* Reset scheduler parameters */
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tcb = this_task();
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tcb = this_task();
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@ -51,6 +51,7 @@
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#include "chip/imx_src.h"
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#include "chip/imx_src.h"
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#include "sctlr.h"
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#include "sctlr.h"
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#include "smp.h"
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#include "smp.h"
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#include "scu.h"
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#include "fpu.h"
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#include "fpu.h"
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#include "gic.h"
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#include "gic.h"
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@ -259,6 +260,10 @@ void imx_cpu_enable(void)
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void arm_cpu_boot(int cpu)
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void arm_cpu_boot(int cpu)
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{
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{
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/* Enable SMP cache coherency for the CPU */
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arm_enable_smp(cpu);
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#ifdef CONFIG_ARCH_FPU
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#ifdef CONFIG_ARCH_FPU
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/* Initialize the FPU */
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/* Initialize the FPU */
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