From 21e42d18c1fdfa7f856d7e93e689d0b67d800325 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 27 Nov 2016 11:28:24 -0600 Subject: [PATCH] ARMv7-A/i.MX6 SMP: Move SMP coherernt cache setup to earlier in initialization of CPUn, n>0 --- arch/arm/src/armv7-a/arm_cpustart.c | 5 ----- arch/arm/src/imx6/imx_cpuboot.c | 5 +++++ 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/src/armv7-a/arm_cpustart.c b/arch/arm/src/armv7-a/arm_cpustart.c index 38928e7aec..c3eab68d4a 100644 --- a/arch/arm/src/armv7-a/arm_cpustart.c +++ b/arch/arm/src/armv7-a/arm_cpustart.c @@ -47,7 +47,6 @@ #include "up_internal.h" #include "cp15_cacheops.h" #include "gic.h" -#include "scu.h" #include "sched/sched.h" #ifdef CONFIG_SMP @@ -110,10 +109,6 @@ int arm_start_handler(int irq, FAR void *context) sinfo("CPU%d Started\n", cpu); - /* Enable SMP cache coherency for the CPU */ - - arm_enable_smp(cpu); - /* Reset scheduler parameters */ tcb = this_task(); diff --git a/arch/arm/src/imx6/imx_cpuboot.c b/arch/arm/src/imx6/imx_cpuboot.c index 4b288b17d1..818b327a4b 100644 --- a/arch/arm/src/imx6/imx_cpuboot.c +++ b/arch/arm/src/imx6/imx_cpuboot.c @@ -51,6 +51,7 @@ #include "chip/imx_src.h" #include "sctlr.h" #include "smp.h" +#include "scu.h" #include "fpu.h" #include "gic.h" @@ -259,6 +260,10 @@ void imx_cpu_enable(void) void arm_cpu_boot(int cpu) { + /* Enable SMP cache coherency for the CPU */ + + arm_enable_smp(cpu); + #ifdef CONFIG_ARCH_FPU /* Initialize the FPU */