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update sof-apl-tdf8532 

consolidate graph styles

Signed-off-by: Curtis Malainey <cujomalainey@google.com>
This commit is contained in:
Curtis Malainey 2018-11-15 18:32:29 -08:00
parent af9d2d4e57
commit 5452897dc9
1 changed files with 6 additions and 10 deletions
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16
topology/sof-apl-tdf8532.m4
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@ -20,16 +20,12 @@ include(`platform/intel/bxt.m4')
# #
# Define the pipelines # Define the pipelines
# #
# PCM0 ----> volume -----> SSP4 # PCM0 -----> Volume -----> SSP4
# PCM1 ----> volume -----> SSP2(Dirana Pb) # PCM1 <----> Volume <----> SSP2(Dirana Pb/Cp)
# <---- Volume <----- SSP2(Dirana Cp) # PCM2 <----> Volume <----> SSP0(BT HFP out/in)
# PCM2 ----> volume -----> SSP0(BT HFP out) # PCM3 <----- Volume <----- SSP1(HDMI in)
# <---- volume <----- SSP0(BT HFP in) # PCM4 <----> Volume <----> SSP3(Modem out/in)
# PCM3 <---- Volume <----- SSP1(HDMI in) # PCM5 <----> Volume <----> SSP5(TestPin out/in)
# PCM4 ----> volume -----> SSP3(Modem out)
# <---- volume <----- SSP3(Modem in)
# PCM5 ----> volume -----> SSP5(TestPin out)
# <---- volume <----- SSP3(TestPin in)
# #
# Low Latency playback pipeline 1 on PCM 0 using max 4 channels of s32le. # Low Latency playback pipeline 1 on PCM 0 using max 4 channels of s32le.