mirror of https://github.com/thesofproject/sof.git
4a9a99aeb2
Clear general purpose pending interrupt before enabling interrupts between host and DSP. The GIPn bit, from MU Status Register is cleared by writing it as “1” in order to de-assert the interrupt request source at the interrupt controller. This fixes a fw loading failure after a soft reboot caused by GIP bit that was 1. The problem was the MU which triggered endless interrupts causing timeout on Kernel side, which was waiting for FW_READY message. Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com> |
||
---|---|---|
.github | ||
app | ||
doc | ||
installer | ||
keys | ||
rimage@65f345a52e | ||
scripts | ||
smex | ||
src | ||
submanifests | ||
test | ||
third_party/include | ||
tools | ||
xtos/include | ||
zephyr | ||
.gitignore | ||
.gitmodules | ||
.travis.yml | ||
CMakeLists.txt | ||
CODEOWNERS | ||
Kconfig | ||
Kconfig.sof | ||
Kconfig.xtos-build | ||
Kconfig.xtos-dbg | ||
Kconfig.zephyr-log | ||
LICENCE | ||
README.md | ||
west.yml |
README.md
Sound Open Firmware
Status
Documentation
See docs
Running the tests
See unit testing documentation
Deployment
TODO: Add additional notes about how to deploy this on a live system
Contributing
See Contributing to the Project
License
This project is licensed under the BSD Clause 3 - see the LICENCE file for details