Cadence library comes with various codecs. In order to support one
codec we need to initialize the API member of cadence_api with exported
library function.
This patch adds Cadence exported functions for aac, bsac, dabplus, drm
and mp3 codecs.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This config symbol adds the cadence_api_function wrapper in the list of
supported Cadence APIs.
This is usually a wrapper over an actual Cadence API function and we
need it in several cases:
- there is no explicit agreement with Cadence over adding a symbol name
to SOF.
- use as a wildcard so that we can easily plugin a codec without
changing the topology.
In this case, one will create a separate binary that will assign to
cadence_api_function the address of the Cadence entry point function
which shouldn't be exposed in SOF code.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
KPB_FORCE_COPY_TYPE forces kpb draining mode to normal. Anyhow,
dummy-dma used by the Host on IMXes doesn't support normal copy mode.
So, by disabling this config we keep the copy mode unchanged.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Some platforms need to force dma copy_type for reasons
mentioned in
commit 9ba1814d1d ("kpb: change draining copy type to normal")
Some platform's DMA controllers (like dummy-dma on IMX does not support
normal copy type).
So, this patch forces the copy type to normal only when
CONFIG_KPB_FORCE_COPY_TYPE_NORMAL is set, otherwise it keeps the existing dma
copy-type.
Also, add Kconfig entry for KPB_FORCE_COPY_TYPE_NORMAL and set it default to y
to keep bisectability up!
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This is used to retrieve the 'value' of a certain 'type' attribute.
First specific implementation for get_attribute is inside Host
component.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
The driver configures a lowest feasible bus clock to save power.
Since the 48 kHz and 16 kHz DMIC DAI can now be instantiated in the
runtime there is possibility that the min. 500 kHz clock allowed could
be too low for a new 48 kHz capture when existing 16 kHz capture is
running.
The topologies those define a 48 kHz DMIC DAI need to increase the min.
clock to a sufficient rate. This patch changes every 500 kHz value to
2.4 MHz. This change does not change the external microphone clock in
any platform. The lower than 2.4 MHz clock rates never happened in
previous version to due to the 48 kHz DAI request in these topologies.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch changes FIR decimation factors preference from
"2, 3, 4, 5, 6, 8, 10, 12" to "2, 3, 4, 6, 5, 8, 12, 10".
The prime number factor 5 and 10 (2*5) are less preferred because
when used for decimate for fist started FIR they restrict more the
configuration choices for the second FIR. If e.g. capture at 16 kHz
is started first with decimation factor 6, the 48 kHz stream can be
decimated from common 96 kHz CIC rate by 2.
Earlier the driver selected decimation by 5 to 16 kHz. There is no
integer decimation factor to decimate from 80 kHz to 48 kHz.
Similarly if decimate to 8 kHz programmed FIR to decimate by 10, the
same 80 kHz rate prevents 48 kHz for the other DAI. Decimation factor
12 sets up CIC to 96 kHz that is compatible with many other sample
rates.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch changes the logic in function select_mode() to use
the defined FIR decimation filters as order of preference for
FIR decimation factors. The earlier logic was simply to select the
lowest decimation factor. It can be used to e.g. prefer decimation
factor 6 over 5 when both are possible.
The driver mode select behavior is not yet changed in this patch. The
filters are presented in increasing decimation factor order in the
header file. The preference order is changed in other patch.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
The maximum length supported by HW is 250 while the existing decimate
by 5 set is 251. Load attempt of it failed always. However it was
needed only in a rare 8 and 16 kHz FIFOs configuration request.
The new coefficients set fixes the issue. Also an alternate decimate
by 3 set is removed as unnecessary and a decimate by 10 set is added.
The DMIC filters design tool was updated for including to SOF tools.
The specification adjust iteration in FIR design was improved to use
finer step for bandwidth (the two four digits numbers in file name
are band frequencies relative to sample rate) so many of the
coefficients are changed. The CIC response estimation gives slightly
different result depending on for which sample rate the decimation factor
is. That is another reason for changed coefficients.
This set is used to have the reference generate script available that
creates these coefficients exactly.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch separates from function configure_registers() the write
of FIFO A, FIFO B, and common functions initialization. The change
allows the DMIC DAI type to be instantiated when the streaming starts
and removed after streaming ends. The driver for was designed to
configure the HW in firmware initialization. It didn't support DAI
initialization at streaming start and remove at end. The start of second
DAI stopped the first. Also the decimation factors selection made
choices those prevented the second DAI to find suitable integer
decimation factors.
The key change is that common functions like CIC are programmed for
first instantiating. The FIR A and the FIFO are set up for FIFO A
connected DAI and FIR B related for FIFO B connected DAI.
The dmic_remove() is changed to pass the common resources stop and
free if there's still a running FIFO left.
The traced registers configuration are changed to 32 bit hex for easier
manual decode of bit fields when debugging.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
The error can be replicated with two interactive mode arecord commands.
After launch press space key to pause both captures and then ctrl-c to
stop both. E.g.
arecord -i -Dhw:0,6 -f S16_LE -c 4 -r 48000 rec06.wav
arecord -i -Dhw:0,7 -f S16_LE -c 4 -r 16000 rec07.wav
The error happened due to no handling for pause state in DMIC DAI type.
The device was set to prepared state instead of pause that conflicted
with power management when resumed. The patch updates dmic_start() to
properly track the active FIFOs count with check of dmic->state before
setting it to COMP_STATE_ACTIVE. Start for active DMIC should no increase
it.
The dmic_stop() is updated to handle pause by removal of state setting.
The set of state is moved to dmic_trigger() to be able to use same stop
function. The dmic_irq_handler() FIFO stop is edit to set prepared
state for stopping it.
The patch alters the external PDM bus function when paused. The
clocks as feature of this patch remain active. Previously stop and
pause were the same. Since the pause is not used for capture so the
small additional power consumption of active microphone is no issue.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
In some cases we need to change dai configuration in firmware. ASoC
supports already setting multiple hw_configs, but sof M4 scripts lack
the mechanism to do this. Thus enable defining multiple config items in
the dai. Enable now support only for SSP by defining new
SSP_MULTI_CONFIG macros that should not clash with the single dai config.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
This patch is based on sof-cml-rt1011-rt5682.m4 but omits the
hard coded keyword pipeline and replaces it with a generic
16 kHz capture pipeline. The use of intel-generic-dmic.m4 to
set up the capture pipeline simplifies the topology a lot. This
change makes the topology for CML I2S quite similar to sof-hda-generic
to add audio processing.
All endpoint processing can be defined from top level CMakeLists.txt
with macros HSMICPROC, HSEARPROC, SPKPROC, DMICPROC, DMIC16KPROC.
A sample topology with equalizers in headset and speaker paths is
added.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Fixes:
rm -rf staging ; make aliases
ln: failed to create symbolic link 'staging/sof/sof-glk.ri': No such
file or directory
This also happens on a brand new checkout when building in parallel with
make -j because symbolic links don't have any dependency. Example at:
https://github.com/marc-hb/sof/runs/2036288013
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Notably: xt-xcc --show-config failed with: No such file or directory
... when the directory exists but is wrong.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Let's try to run checkpatch in an open-source and fast way while
leveraging Github's very good user interface.
Run checkpatch both with and without --strict; this has been a source of
confusion in the past, see
https://github.com/thesofproject/linux/pull/1988
Note this attempt does not rely on git merge-bases which has been found
to be not compatible with shallow cloning:
https://github.com/thesofproject/linux/issues/2556
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
XTENSA_TOOLS_ROOT is required by xtensa-build-all.sh anyway, so don't
force the user to say twice that they want xcc.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Add a new token in scheduler tokens to flag a pipeline
as dynamic. Modify the DAI_ADD ans PIPLINE_PCM_ADD macros
to indicate if the pipeline should be dynamic or now. It is
also possible to make all pipelines in a topology dynamic
by defining the macro DYNAMIC during build.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
In the future we should probably extract the array of XTENSA_SYSTEM
values out of xtensa-build-all.sh
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
This patch adds the include of mixercontrol.m4. The topologies build
fails if none of the earlier parsed pipelines contains the same
include.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
The mistake in the topology macro causes overwrite DMICPROC with
volume if HSPROC is not defined. This patch fixes the macro line
to handle properly HSPROC.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
With this kconfig option set to y SOF does not build on i.MX platforms,
so we disable this optimized conversion.
The warning below is treated as an error.
sof/src/audio/pcm_converter/pcm_converter_hifi3.c: In function ‘pcm_convert_f_to_s16_lin’:
sof/src/audio/pcm_converter/pcm_converter_hifi3.c:681: warning: implicit declaration of function ‘XT_ROUND_S’
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
There is no such compiler as RF-2017.8 that is in use. The correct
compiler is RG-2017.8 for all i.MX platforms.
Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
Existing code returns every time the API function at index 0, which works
now because we support only a single API function. But, this will break
when patches adding multiple Cadence codec types will be merged.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
In buffer_size calculation period_bytes should be aligned with dma
before multiplying with period_count. This is an issue for example when
period_bytes could be smaller than the dma alignment size like with 8khz
16 bit mono stream.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
Add cmake -DINIT_CONFIG= option that can point at any initial file.
"make clean" does not delete .config any more.
Note reconfiguration does NOT causes recompilation because -imacros
hides the generated .h from CMake's dependency scan. This is not a
regression, that problems exists since -imacros was introduced. At least
it's now possible to "make clean" and rebuild without losing the .config
file.
Fix for #3617
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
A buffer should be prevented from being freed only
if both the sink and the source widgets are active.
In the case of dynamic pipeline loading, a buffer
belonging to a pipeline will need to freed when that
pipeline is no longer active but the other end of the
buffer might still be active. So, change the logic
to check if both the sink and source widget states
are invalid to prevent the buffer from being freed.
Also make sure that the buffer is disconnected from the
active comp before it is freed.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
New implementation does not rely on left shift of signed value and
has no code duplication. Output is the same as original.
found by cppcheck
Signed-off-by: Oleksandr Strelchenko <oleksandr.strelchenko@waves.com>
We need to follow TGL specific HW recommended flow to get/put
PM_RUNTIME_DSP, even for not release_unused clocks requirement.
This will address the PM_GATE IPC failure issue:
https://github.com/thesofproject/sof/issues/3823
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Q_SHIFT_LEFT doesn't check overflow itself. We should do saturation
after left shifts to avoid erroreous value after left shifts.
Signed-off-by: Pin-chih Lin <johnylin@google.com>
When setting parameters some API calls might not be fatal, so there
is no need to fail the apply config phase in this case.
For example, in case of Cadence MP3 codec the only supported PCM
output word size is 16 and 24. Trying to set a PCM word size of 32
will result in a non-fatal error and the word size would be adjusted to
24.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
The SYSTICK_PERIOD is used for system agent only now, remove the
schedule part from the description.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Reschedule once interrupt is handled by all cores(clients) according to
the earlist task of the list, and enable interrupt on cores that have
tasks to run.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
At interrupt handling & tasks_run(): run each pending task of the core,
e.g. for period tasks:
previously: update task->start based on last_tick(asynchronized), if the
last_tick was delayed, the delay will be accumulated to the subsequent
periods!
new: update task->start based on last task->start, to try to make the
task's running follow the pipeline requirement as more as possible.
Add lock/unlock for domain accessing and updating while keep task can
run simultaneously on multiple cores.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Refine and simplify the domain_set/clear() part:
1. Use UINT64_MAX to denote that the domain is not set.
2. For _domain_set(), set only when needed. e.g. the first task over all
cores being added, or a task asking for earlier timer being added.
The _domain_set() logic is refined as below:
a. For first task, set domain according to the required start, else
b. for one shot task, set domain if it is earlier, else
c. for earlier periodic task, try to make it cadence-aligned with the
existed task, else
d. for later periodic task, simply cover it by the coming interrupt.
3. For _domain_clear() logic, simplify to call it when the last client is
freed.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Do timer_domain refining as below:
Use unified LL_TIMER_SET_OVERHEAD_TICKS=1000 which denote the max
overhead that the timer_domain_set() will take, and remove the
definition from each platforms.
Don't add any overhead if no needed(e.g. if the start > current +
overhead). This will help to schedule the task ASAP, and make the
catching up (of the previous delay) possible.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
rename the last_tick to next_tick, which means the one already set
to the timer, for more easy to understand.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
So far we only used topologies with rate set
to 48 000Hz. This might change in the future.
So use rate from parameters passed from kernel.
While here, align sof_ipc_dai_esai_params struct
with the one from kernel.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
One-touch "make -C installer rsync" combines fast incremental build,
staging and deploy in one command.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
The tools build is independent from the firmware build. The next step is
to invoke it from here if needed.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Daniel Baluta