Some of interface headers are not needed by kernel,
but are needed by user-space applications, so we can split them
into multiple directories that indicate their purpose.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
Ipc private data needed by ptable processing removed from
platforms that do not use it.
Less ifdef-s in the main common ipc code, another new unit
compiled for platforms that require ptables.
Dependency on the private data removed from the main ipc code
and moved to the platform specific code. A dependency between
ipc-host-ptable and platform's ipc private data is easier to
maintain then duplicated code in the main ipc units.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
This flag is not private since used by the common IPC handler layer.
This move enables also the next step to make the ipc private data really
private (hidden in the platform ipc code) and make platform specific.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
Pipeline format determines the buffer size calculation. With the
pipeline format set to S16_LE, hw_params fails for S24_LE and S32_LE
formats. So, change the pipeline format to s32le to support all
three formats.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
The unit of trace header timestamp is ticks but it is nanosecond
in trace params. So we have to convert it to ticks.
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Meu flags can be extended with MEU_EXTRA_FLAGS variable.
These flags are added after default arguments.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
Apollolake+/i.MX have reset vector in ROM. So far we have
used platform config symbols to tell which platforms have
the reset vector in ROM.
Anyhow, things are starting to get ugly here with more
platforms to come so we add an internal config symbol
which will be set by each each platform when needed.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
The recommended HDA HW programming sequence for setting
the DMA format requires that the link DMA and host DMA
channels be coupled before setting the format. This
change means that host DMA or link DMA channels be
reserved even if only one is used.
Statically assigned link DMA channels would mean that
all the corresponding host DMA channels will need to be
reserved, leaving only a few channels available at run-time.
So, the suggestion here is to switch to dynamically assigning
both host DMA channels and link DMA channels are run-time.
This change means that the DAI_CONFIG IPC will be sent
multiple times during link hw_params and link hw_free
ioctl. The DAI config parameters will remain the same
except for the link DMA channel that will be assigned at
run-time. A value of DMA_CHAN_INVALID from the driver
during hw_free indicates a request to free the current
link DMA channel in use. The current channel in use
is freed before assiging the new channel requested in
the DAI_CONFIG IPC.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
We already have CONFIG_DEBUG* symbols in Kconfig,
this one is still defined in code, so it should be
moved also to Kconfig.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
Change symbols to be more explicit.
There are different sizes of the same pattern, so they
should indicate which one has what size.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
It's better to have general options earlier in menuconfig
and specific options later.
Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
Mux component implementation. Support for mux and demux operation
modes, channel routing and summation with saturation.
Mux component can operate in 2 modes:
demux - with single input stream and multiple output streams
(up to MUX_MAX_STREAMS)
mux - with multiple input streams and single output stream
It can also work with 1:1 I/O in both modes to act as
channel router / summator.
It is configured via binary blob specifying channel routing
using bitmasks.
In case of demux mode every output stream has an array of bitmasks,
one mask per channel, specifying which of the input channels should
be used to compose it.
Similarly for mux, each input stream has bitmask for each of it's
channels to specify to which output channel it contributes.
Signed-off-by: ArturX Kloniecki <arturx.kloniecki@linux.intel.com>
This patch changes the secondary DMIC FIFO configuration into 32 bits
mode for better quality. Since there is volume component in DMIC
capture pipelines the conversion to other PCM formats can happen
there. Using volume controller with 32 bit input gives a lot better
audio quality when the microphone signal needs amplification.
The scheduling of 16 kHz DAI is changed to 1000us. The comment
of 1000 us is correct but the parameter 48 is not. With 16 frames
the scheduling becomes the desired. This change should also save
some RAM due to smaller buffers.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch restores the missing configuration into macro
intel-generic-dmic.m4. Without this patch the 48 kHz DMIC DAI
is not created. Both DMIC FIFOs are available at any channels
number and PCM format so there is no need to delete a DAI when
4ch configuration is used.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Adds skeleton drivers for:
* ESAI, Enhanced Serial Audio Interface
* EDMA, Enhanced DMA Controler
* dummy DMA, simple dummy DMA to emulate API for copying data
between Host and DSP.
* timer, ipc - imx8 specific implementation
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This adds minimal support for platform drivers (dai, dma, clk)
and general platform initialization.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
i.MX 8 family of applications processor has 3-subfamilies:
* i.MX 8, for advanced graphics, performance and virtualization
* i.MX 8X, for safety and efficent performance
* i.MX 8M, for advanced audio, voice and video
(yes, you are right i.MX 8 is the generic SoC family but also a subfamily).
All of the subfamilies have SoC designs which include a DSP for efficient
audio processing. DSP has direct access to SDRAM and to Audio
peripherals.
https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors:IMX8-SERIES
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Similar with: commit 52e25dc814 ("xtensa: exception: Some xtensa..")
we need this patch because imx8 config does not have level 6 IRQ and
we hit a compilation error.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Currently we have 1.5 times buffering after SRC in media pipeline. This
will not work for S24 or S32 playback as SRC will use the bigger buffers
with non-integer sample rate conversions as 44.1kHz to 48kHz. So add as
big buffer after SRC as before it.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
This patch updates the gain update coefficient to achieve
a longer ramp time. The previous 300 ms long ramp was not
enough to conceal all of the slow DC component settling seen
in the beginning of DMIC capture.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Using hex %x format in comp_update_buffer_consume for tracing
addresses and bitfields is more readible than decimal
format.
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
I've added counters for processed and received ipc tasks.
They are dropped after trace points in memory window.
Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
Janusz Jankowski