Also move system headers stdbool.h and stdint.h last to avoid them being
accidentally included.
Fixes commit b91e253f65 ("include: sof: debug: Split panic.h into
Zephyr and XTOS-specific headers") that broke `scripts/fuzz.sh` because
it stopped `sof/ipc/common.h` from accidentally getting `ipc/stream.h`
through `panic.h`.
Fixes:
```
src/include/sof/ipc/common.h:126:15: warning: declaration of
'struct sof_ipc_host_buffer' will not be visible outside of
this function [-Wvisibility]
struct sof_ipc_host_buffer *ring,
^
```
```
sof/src/ipc/ipc3/host-page-table.c:151:5: error: conflicting types
for 'ipc_process_host_buffer'
int ipc_process_host_buffer(struct ipc *ipc,
^
sof/zephyr/../src/include/sof/ipc/common.h:125:5: note: previous
declaration is here:
int ipc_process_host_buffer(struct ipc *ipc,
```
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
`msg.h` needs `ipc/trace.h` for `sof_ipc_dma_trace_posn`
Fixes commit b91e253f65 ("include: sof: debug: Split panic.h into
Zephyr and XTOS-specific headers") that broke `scripts/fuzz.sh` because
it stopped `ipc/msg.h` from accidentally getting `ipc/trace.h` through
`panic.h`.
Fixes:
```
src/include/sof/ipc/msg.h:146:34: warning: declaration of
'struct sof_ipc_dma_trace_posn' will not be visible outside
of this function [-Wvisibility]
void ipc_build_trace_posn(struct sof_ipc_dma_trace_posn *posn);
```
```
sof/src/trace/dma-trace.c:160:23: warning: incompatible pointer
types passing 'struct sof_ipc_dma_trace_posn *' to parameter of
type 'struct sof_ipc_dma_trace_posn *' [-Wincompatible-pointer-types]
ipc_build_trace_posn(&sof->dmat->posn);
^~~~~~~~~~~~~~~~
sof/zephyr/../src/include/sof/ipc/msg.h:146:58: note: passing argument
to parameter 'posn' here
void ipc_build_trace_posn(struct sof_ipc_dma_trace_posn *posn);
```
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Add HiFi3 implementation of dcblock processing functions.
Compared with generic C version, the 16 bit format can save
about 48.1% cycles, and 48.4% for 24 bit format and 52.6%
for 32 bit.
Signed-off-by: Andrula Song <andrula.song@intel.com>
Upgrade to the present rimage upstream version to fix tgl building
with Zephyr main branch head.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Configure in/out buffer stream params.
In Windows scenarios, unconfigured values were causing zero-division
exception in audio_stream_get_avail_frames.
Signed-off-by: Przemyslaw Blaszkowski <przemyslaw.blaszkowski@intel.com>
For calculating sample group size, sample container size should be
taken instead of valid bit depth.
Signed-off-by: Przemyslaw Blaszkowski <przemyslaw.blaszkowski@intel.com>
This patch fixes DMIC capture for TGL platform in IPC3 mode. The
error seen in firmware trace is:
ERROR dmic_irq_handler(): full fifo A or PDM overrun
ERROR dw_dma_get_data_size(): xrun detected
The set of sar and dar is restored to driver. It was removed
with function dw_dma_mask_address() when removing support for
BDW and HSW platforms. The two first lines removed from the
function are needed for all platforms. The lines were added
to where the function was originally called.
Fixes commit d80635054f
("platform: remove support for Broadwell and Haswell")
Suggested-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
It is recommended to poll with timeout after disabling the channel to
ensure that the channel has been actually disabled.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
If coherent object is at non-zero offset, the init call ends
up invalidating data cache outside the allocated buffer.
All current users of "struct coherent" have the object as
the first member, so nothing is broken with current code.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This patch adds simplified linux/types.h into testbench headers
to enable include of ALSA asoc.h to build without other difficult
kernel headers content.
The CMakeLists.txt files are updated to make a build time copy of
asoc.h to subdirectory include of the build directories. The new
directory is added to headers path.
This change avoids build fail with xcc toolchain that can't use the
gcc toolchain headers from the system where the ALSA headers are
located.
Suggested-by: Marc Herbert <marc.herbert@intel.com>
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
During start trigger, the DMA is be started first followed by the DAI. The
same order should also apply for the release triggers. Conversely, during
stop/pause the DAI must be stopped first before the DMA.
But some platforms cannot handle the conventional ordering during the
stop/pause triggers. Add a new config,
COMP_DAI_STOP_TRIGGER_ORDER_REVERSE, that will be used to reverse the
DMA and DAI trigger order during stop/pause. Also, fix the stop case to
use the new config to reverse the ordering instead of
COMP_DMA_SUSPEND_DRAIN.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
In ipc4/alh.h we have:
#define IPC4_ALH_MULTI_GTW_BASE 0x50
In ipc4/gateway.h:
#define ALH_MULTI_GTW_BASE 0x50
These were added almost simultaneously by two separate pull-requests.
No need to have them both.
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Fix below sparse warnings:
zephyr_dp_schedule.c:134:20: warning: incorrect type in argument 1
(different address spaces)
zephyr_dp_schedule.c:348:36: warning: incorrect type in assignment
(different address spaces)
introduced by 3ee1d787
Signed-off-by: Chao Song <chao.song@linux.intel.com>
Current pipeline implementation assumes that modules are bound one by
one from input to output gateway (Host to DAI or DAI to Host). If
neighbor module does not have direction configured, FW returns error.
This assumption is incorrect. Driver can bind modules that are not yet
bound to any gateway. FW should check connections only when driver
finish binding all modules and set pipeline state.
Signed-off-by: Przemyslaw Blaszkowski <przemyslaw.blaszkowski@intel.com>
At least some versions of the Cadence toolchain for this platform are
built with a slightly variant libc (vs. the newlib build which seems
more common for other SOF devices). That's fine in principle, SOF
doesn't call anything out of the libc anyway. But when linking with
the C++ standard libraries, it pulls symbols out that need to go in
otherwise-unrecognized linker sections. And it wants to see an
_unlink_r() function (the reentrant worker underneath unlink())
defined for reasons that completely escape me.
Signed-off-by: Andy Ross <andyross@google.com>
Pointer arithmetic with void pointer is not allowed. Functions
get_token_uint32_t() and get_token_comp_format() are updated
to handle correctly the bytes offset.
Functions get_token_dai_type() and get_token_process_type() are
updated to similar pointer arithmetic style as previous.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
For some reason the input valid bit depth was 16. But the output
valid bit depth of the previous widget is 32. Fix it to 32 now.
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
The xt-xcc compiler RG-2017.8 does not support -Wimplicit-fallthrough
option. Add to CMakeLists.txt files check for the option and use it if
it is supported.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
The ipc4_native_drivers_overlay.conf overlay is deprecated and isn't
used any more, the default ipc4_overlay.conf configures native
drivers itself. Remove the deprecated version.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This patch adds for testbench CONFIG_MATH_IIR_DF2T. The issue was
triggered by add of IIR DF1 as default. Crossover component is
still using DF2T.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Reduce complexity by parsing all topology objects in memory rather than
by seeking file, reading into allocated memory and then freeing memory.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
The original fuzzer has been deprecated for some time now. Remove it.
All fuzzing now done by OSS-fuzz
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Fixes recent commit 8aab18351f ("xtensa-build-zephyr: fix
DEFAULT_TOOLCHAIN_VARIANT spill on next platf")
Some XtensaTools installation are missing this `default-params` symbolic
link:
```
XtensaTools/config/
|-- X4H3I16w2D48w3a_2017_8-params
|-- X6H3CNL_2017_8-params
|-- cavs2x_LX6HiFi3_2017_8-params
`-- default-params -> cavs2x_LX6HiFi3_2017_8-params
```
Maybe it's missing when installing with the graphical interface?
This symbolic link is surprisingly enough to make `xt-objcopy` work
_without_ the XTENSA_ variables. But when the variables _and_ the link
are both missing, then `xt-objcopy` fails with the usual error:
```
in current dir: work/current/sof; running command:
XtDevTools/install/tools/RG-2017.8-linux/XtensaTools/bin/xt-objcopy
--remove-section .comment sof/build-tgl/zephyr/zephyr.strip
build-sof-staging/sof-info/tgl/stripped-zephyr.elf
Error: there is no Xtensa core registered as the default.
You need to either specify the name of a registered Xtensa core (with
the --xtensa-core option or the XTENSA_CORE environment variable) or
specify a different registry of Xtensa cores (with the --xtensa-system
option or the XTENSA_SYSTEM environment variable).
The following Xtensa cores are available:
hifiep_bd5
cavs2x_LX6HiFi3_2017_8
sample_config
sample_flix
...
```
Fix this failure by simply passing the XTENSA_ variables to xt-objcopy.
Kudos to Seppo Ingalsuo for the interactive debugging session that
allowed root-causing this problem extremely quickly.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
If the max_block_count attribute is zero, this may lead to
division by zero error. Handle this explicitly but reporting
error if max_block_count is zero.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Volume has multiple data arrays sized to SOF_IPC_MAX_CHANNELS
and code that uses these arrays without bounds checks (like
volume_ramp()).
Add a sanity check to volume_prepare() to ensure channels
count is never set to a higher value.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Current code may end up dereferencing null pointers in case
memory allocations fail in ams_init(). Handle this with proper
error handling.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This commit prevents DP modueles from run on different cores than
the pipleine LL modules. This limitation is enforced because of
possible cache races in pipeline_for_each_comp()
To be removed till safe implementation is ready
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Pipeline creation
- create a task for each DP module when started
on primary or secondary core
- delete a task for each DP module when stopped
- don't call comp_copy in LL context for DP modules
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
A component need to keep an information about how it need to be
scheduled - as LowLatency or DataProcessing. The information comes
from IPC4 init instance message
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
The DP scheduler is a scheduler based on Zephyr preemptible
threads. It will start each SOF task as a separate Zephyr
thread.
At current implementation the scheduler can trigger each
task/thread periodically or on demand.
TODO: more sophisticated scheduling decisions, with deadline
and task budgets calculations.
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
some platforms don't use Zephyr, therefore they can't
use DP scheduler. Add a config option
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
The CMakeList.txt files in tools/topology/ have always confused two
different things:
- the list of .tplg files to generate, and
- the CMake logic used to invoke alsatplg and generate them.
Separate the two at last thanks a dead-simple `include()` command. If I
had knew it was so easy I would have done this much sooner.
The `tools/build_tools/` directory is identical before versus after this
commit.
This will make it much faster to identify what actually changes in
future commits and pull requests. This will also make CODEOWNERS
smarter and reduce Github notification noise.
Don't do it for topology1 to minimize churn and git disruption in
backports. Topology1 is not very active any more whereas topology2 has
never been released yet.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Decompose the split in the next commit into two steps to maximize git's
similarity index and facilitate git blame, cherry-pick/rebase, merge,
etc.
The new files are unused in this first commit so git bisect is not
affected.
Changing one-character in the source files also helps: compare git show
-C with git show -C -C. It's also a good clue for the reader when not
using -C.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
In case one of the sources is inactive, the avail_frames
for that source is 0 and the frames = 0.
So, later on, there is nothing to copy, even if, at least
one source is still active.
In this case, we get a "write error: Input/output error".
To fix this, allow mixer to process data from at least one
source, if that is active.
Or, in other words, if any source is inactive, skip it.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
The config to get for smart_amp_test module is
struct sof_smart_amp_config, instead of the bigger
wrapper struct smart_amp_data, so the config size
should be the size of struct sof_smart_amp_config.
Signed-off-by: Chao Song <chao.song@linux.intel.com>
We use zero-size arrays throughout the code in place of flexible
arrays. There are only two cases where flexible arrays cannot be
used: inside unions and where such an array is the only member of the
structure. In all other cases we can switch to flexible arrays to let
the compiler warn us of any improper use.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
struct ipc4_module_init_instance contains 4 structures at the end,
that aren't currently used in the firmware. Some of them like
struct ipc4_module_init_ext_data have a flexible array at the end
but can have further structures following them. Remove these
structures until any of them are needed, at which point they can be
re-added with proper size accounting.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
xtensa-build-zephyr.py has always defined XTENSA_ and other environment
variables in the current environment shared by all platforms. This was
always bad but apparently never a problem until the addition of the new
DEFAULT_TOOLCHAIN_VARIANT (xcc or clang) variable.
Before DEFAULT_TOOLCHAIN_VARIANT, each platform's environment would
simply override the previous one. However with the new
DEFAULT_TOOLCHAIN_VARIANT, the current environment has precedence for
more flexibility. This makes each platform "spill" onto the next one and
`xtensa-build-zephyr.py -p tgl mtl` fail like this:
```
-- Board: intel_adsp_ace15_mtpm
-- Found toolchain: xcc (/home/XCC/install/tools)
CMake Error at zephyr/cmake/compiler/xcc/generic.cmake:9 (message):
Zephyr was unable to find the toolchain. Is the environment
misconfigured?
User-configuration:
ZEPHYR_TOOLCHAIN_VARIANT: xcc
Internal variables:
CROSS_COMPILE:
/home/XCC/install/tools/RI-2022.10-linux/XtensaTools/bin/xt-
```
To fix this, stop modifying the current os.environ and use a new, fresh
os.environ.copy() for each platform instead.
Fixes commit 309fa264e2 ("xtensa-build-zephyr.py: upgraded Xtensa
toolchain for MTL")
History repeats itself: commit 6bedd8e742 ("xtensa-build-zephyr: fix
RIMAGE_KEY when building multiple platforms") fixed the same logical
error months ago in a different script.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
The simple {0} is not accepted by xt-xcc compiler. It gives
"warning: missing braces around initializer".
Adding sufficient number of braces to match the struct definition
fixes the build.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Add a second level of mixin-mixout mixing and a PCM to the nocodec
topology.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Add HiFi4 implementation of dcblock processing functions.
Compared with generic C version, the 16 bit format can save
about 54.8% cycles, and 53.1% for 24 bit format and 49.1%
for 32 bit.
Signed-off-by: Andrula Song <andrula.song@intel.com>
Marc Herbert