Commit Graph

13 Commits

Author SHA1 Message Date
Laurentiu Mihalcea 6aa71dd6f2 zephyr: lib: alloc.c: Add heap for ARM64 platforms
This commit places the heap inside the .bss section for
all ARM64 platforms.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-04-20 12:59:24 +03:00
Jaska Uimonen e9cfb64f0d zephyr: cavs: use zephyr pm, clk and dma glue
Start using zephyr pm_runtime, clk and dma glue code in cavs25 native
drivers build. Move the files from ace/lib into zephyr/lib.

Also update west.yaml to related zephyr commit as power related
files have been moved to zephyr side.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2023-03-27 12:37:26 +03:00
Laurentiu Mihalcea 7ed1159e48 Switch to using rtos/idc.h instead of sof/drivers/idc.h
The purpose of this commit is to separate the XTOS-specifc
code from the Zephyr-specifc code found in sof/drivers/idc.h.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-02-24 14:28:49 +02:00
Jaska Uimonen 1e21a5d2fc zephyr: lib: move cpu.c from lib-zephyr
Move zephyr cpu.c from "unnecessary" lib-zephyr to lib/zephyr.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2023-02-23 22:17:07 +00:00
Jakub Dabek 99093bac4e memory: Add virtual memory regions gathering and structs
Add virtual memory regions info gathering from zephyr and introduce
structs agregating this information.
Add proper defines for memory management.

Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
2023-01-17 16:10:44 +02:00
Guennadi Liakhovetski fcd6e9541d alloc: fix argument for cache alias conversion
z_soc_uncached_ptr() takes a cached alias as argument.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2022-12-19 17:21:53 +00:00
Andy Ross 3ae99d937a zephyr/wrapper: Handle OOM correctly in rzalloc()
Fuzzing caught this function failing to handle a heap failure and crashing.

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Andy Ross c50eddce1f platform: Add Zephyr native_posix-based emulation environment
This extends the ideas in CONFIG_LIBRARY=y to implement SOF as an
application for the Zephyr native_posix architecture.  These are host
x86 or x86_64 binaries that include a full OS build, which can be used
(via mocked drivers) for testing against host validation environments
like ASAN/MSAN.

The mechanism uses the existing "host" architecture used by
CONFIG_LIBRARY, but adds a new platform layer named "posix", populated
entirely with stubs.

No driver integration is provided in this patch.  The resulting
executable builds correctly, but has no devices and won't do anything.

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Andy Ross 054230481f zephyr: Not all builds are xtensa
Don't need the arch-specific cache header if we're building for native_posix

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Marcin Szkudlinski b033740402 mtl: add support L3 (IMR) heap
L3 memory should support have support
for allocating/freeing memory
A heap support in L3 is introduced by
this commit

Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2022-11-30 13:43:10 +00:00
Marcin Szkudlinski bb9e2cc147 move HPSRAM heap size def to zephyr adsp_memory.h
The heap size def should not be in alloc.c
This is a platform specific setting
Also (unused by now) macros regarding IMR bootloader
have been removed - moved to Zephyr

Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2022-11-30 13:43:10 +00:00
Marcin Szkudlinski 51c2bc1eb6 IMRheap preparation - cleanup in alloc.c
A quick cleanum in alloc.c
 - code style
 - code not relevant to CAVS/ACE

Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2022-11-30 13:43:10 +00:00
Marcin Szkudlinski 315962c4d7 zephyr: move memory allocation code 1:1 from wrapper.c to alloc.c
to have more order in the code - move memory code from a huge
common wrapper.c to specific lib/alloc.c
Note there is NO changes in the code, code is as it was before

Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2022-11-21 17:09:52 +00:00