Commit Graph

31 Commits

Author SHA1 Message Date
Rander Wang b7858e8af1 zephyr: cavs: add secondary core context save support
Register pm_state_notifier to set ready_flag for secondary core when it
is powered up for second time after first fw boot. We can remove
CONFIG_ADSP_IMR_CONTEXT_SAVE check for cavs platform for this feature.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2023-11-09 11:17:43 +02:00
Tomasz Leman 6d2352a107 west.yml: update zephyr to 3.5.0-rc1
Zepych update: total of 853 commits.

Changes include:

i8c4eec7ac6 intel_adsp: boot_complete must be done PRE_KERNEL_1
1fc16e6565 release: Zephyr 3.5.0-rc1
c910dc81a6 sys_clock: header: minor cleanup and doxygenization
b9f8b91692 kernel: sys_clock: remove stray z_enable_sys_clock prototype
cc2a558707 kernel: move more internal smp calls into internal domain
a1c7bfbc63 kernel: remove unused z_init_thread_base from kernel.h
209ff606be kernel: move internal smp calls to a internal header
e19f21cb27 kernel: move z_is_thread_essential out of public kernel header
f0c7fbf0f1 kernel: move sched_priq.h to internal/ folder
e6f1090553 kernel: Integrate object core statistics
1d5d674e0d kernel: Add initial k_obj_core_stats infrastructure
6df8efe354 kernel: Integrate object cores into kernel
55db86e512 kernel: Add initial obj_core infrastructure
eb1e5a161d kernel: FIFO and LIFO have their own sections
9bedfd82a2 kernel: Refactor CPU usage
baea37aeb4 kernel: Re-factor sys_mem_blocks definition
2f003e59e4 kernel: Re-factor k_mem_slab definition
41e0a4a371 llext: Linkable loadable extensions
4289359eb2 modules: mcux: fix HAS_CMSIS_CORE selection
1194a35aa2 xtensa: cast char* to void* during stack dump with %p
fcf22e59b8 xtensa: mark arch_switch ALWAYS_INLINE
b2f7ea0523 soc: xtensa/intel_adsp/ace: fix _end location
e560bd6b8c boards: intel_adsp: fix board compatible
b4998c357e mm_drv: tlb: Fix compile time warning
759e07bebe intel_adsp: move memory window setup to PRE_KERNEL_1

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-10-03 09:55:47 +03:00
Kai Vehmanen 9f2d19d30c vmh_free: cosmetic changes to local variable
The_very_long_variable names make it hard to modify
the code and keep to under-100-characters coding
guidelines of the codebase.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-10-03 09:55:47 +03:00
Gerard Marull-Paretas 014d2624ca zephyr: lib: regions_mm: add missing init.h
Because module uses SYS_INIT defined in init.h. Things likely worked
because of indirect includes.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-09-06 14:09:36 +03:00
Gerard Marull-Paretas b66e79dc3d zephyr: lib: alloc: s/device.h/init.h
Module is using Zephyr SYS_INIT API, defined in init.h, not device.h.
Code relied on indirect includes.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-09-06 14:09:36 +03:00
Rander Wang 9b08ce026d zephyr: cpu: use correct condition to init cpu
When converting #ifdef CONFIG_ADSP_IMR_CONTEXT_SAVE to if(IS_ENABLE(
CONFIG_ADSP_IMR_CONTEXT_SAVE), we should use if (!IS_ENABLE() ||

Signed-off-by: Rander Wang <rander.wang@intel.com>
2023-08-17 20:23:46 +03:00
Rander Wang 84befa2563 zephyr: cpu: init cpu if context save is not support
Fix multicore test issue on cavs platforms which don't support context
save now, so need to init cpu when the core boot up.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2023-08-16 13:43:38 +01:00
Jakub Dabek 4ac2ed4b3b vmh: fix build errors
Last commit created build errors in some configurations. Add fixes
to those issues.

Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
2023-08-02 08:45:18 +02:00
Jakub Dabek 45d56931ef memory management: Add virtual heap memory allocators
Add virtual heap allocators that allocate on proper heaps and
map physical memory where nesscessary.
Add free function that frees up the virtual heap memory and
unmaps physical memory when possible.
Virtual heap allocator allows using virtual memory as a base
for allocation and booking memory. Physical memory banks
will be mapped when needed allowing for greater flexibility
with mapping.

Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
2023-08-01 08:55:50 +02:00
Flavio Ceolin 07455c572e zephyr: s/MP_NUM_CPUS/MP_MAX_NUM_CPUS/
Zephyr uses MP_MAX_NUM_CPUS internally to represent the
number of cores available and consequently to allocate
resources. It is even expected, and checked through assert,
that these two symbols have the same value. Use different
value can lead to an undesired behavior, so lets use
MP_MAX_NUM_CPUS.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-07-25 15:27:05 +01:00
Marcin Szkudlinski 4e8040c232 platform: ace: Add pm notifiers to support Zephyr's D3 transition
During PowerOff (D3) transition Zephyr Power Manager must have
a pointer in IMR to save the LP/HPSRAM memory before
powering off.

As zephyr has no access to IMR heap, the memory must
be allocated by SOF

Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2023-06-28 15:32:16 +03:00
Tomasz Leman 9b4a618c52 pm: policy: d0i3: wait for ipc ack before pg
The DSP cannot enter the power gating state if it has not yet received
an ack from host after sending an ipc message.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-05-25 14:45:42 +03:00
Jaroslaw Stelter 02635875fb lnl: Lunarlake configuration
Add initial LNL configuration.
Enable building for xt-clang.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-05-24 18:52:53 +03:00
Tomasz Leman 93947f98a4 platform: ace: notifying about idle thread readiness
Informing the primary core that the Idle thread on secondary core is
ready. During the D3 exit flow thread is not initialize again, but
restored from previously saved context.

This patch includes also zephyr version update to aba3b12e31 (total 15
commits). Changes related to intel_adsp contain refactor and fixes for
ACE secondary cores power flows.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-05-11 19:08:28 +03:00
Tomasz Leman a048951286 zephyr: cpu: secondary core idle thread init
Idle thread should be initialize only when core it booting for the first
time. Doing this again would overwrite the kernel structs and the idle
thread stack.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-05-11 19:08:28 +03:00
Anas Nashif 54c4b88d57 zephyr: use system cache API
Use zephyr cache APIs instead of xtensa specific ones.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-04-28 10:37:55 +03:00
Gerard Marull-Paretas ca68ba68f2 zephyr: update SYS_INIT calls
Update Zephyr head, and use the new call signature:
int (*init_fn)(void);

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-04-24 19:13:47 +03:00
Laurentiu Mihalcea f7d9e76f95 Remove unused <soc.h> header inclusions
This commit removes all occurrences of the soc.h header file
since this is not used. This also fixes build problem on i.MX93
caused by the fact that i.MX93 doesn't have a soc.h.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-04-24 11:40:53 +03:00
Laurentiu Mihalcea 6aa71dd6f2 zephyr: lib: alloc.c: Add heap for ARM64 platforms
This commit places the heap inside the .bss section for
all ARM64 platforms.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-04-20 12:59:24 +03:00
Jaska Uimonen e9cfb64f0d zephyr: cavs: use zephyr pm, clk and dma glue
Start using zephyr pm_runtime, clk and dma glue code in cavs25 native
drivers build. Move the files from ace/lib into zephyr/lib.

Also update west.yaml to related zephyr commit as power related
files have been moved to zephyr side.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2023-03-27 12:37:26 +03:00
Laurentiu Mihalcea 7ed1159e48 Switch to using rtos/idc.h instead of sof/drivers/idc.h
The purpose of this commit is to separate the XTOS-specifc
code from the Zephyr-specifc code found in sof/drivers/idc.h.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-02-24 14:28:49 +02:00
Jaska Uimonen 1e21a5d2fc zephyr: lib: move cpu.c from lib-zephyr
Move zephyr cpu.c from "unnecessary" lib-zephyr to lib/zephyr.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2023-02-23 22:17:07 +00:00
Jakub Dabek 99093bac4e memory: Add virtual memory regions gathering and structs
Add virtual memory regions info gathering from zephyr and introduce
structs agregating this information.
Add proper defines for memory management.

Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
2023-01-17 16:10:44 +02:00
Guennadi Liakhovetski fcd6e9541d alloc: fix argument for cache alias conversion
z_soc_uncached_ptr() takes a cached alias as argument.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2022-12-19 17:21:53 +00:00
Andy Ross 3ae99d937a zephyr/wrapper: Handle OOM correctly in rzalloc()
Fuzzing caught this function failing to handle a heap failure and crashing.

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Andy Ross c50eddce1f platform: Add Zephyr native_posix-based emulation environment
This extends the ideas in CONFIG_LIBRARY=y to implement SOF as an
application for the Zephyr native_posix architecture.  These are host
x86 or x86_64 binaries that include a full OS build, which can be used
(via mocked drivers) for testing against host validation environments
like ASAN/MSAN.

The mechanism uses the existing "host" architecture used by
CONFIG_LIBRARY, but adds a new platform layer named "posix", populated
entirely with stubs.

No driver integration is provided in this patch.  The resulting
executable builds correctly, but has no devices and won't do anything.

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Andy Ross 054230481f zephyr: Not all builds are xtensa
Don't need the arch-specific cache header if we're building for native_posix

Signed-off-by: Andy Ross <andyross@google.com>
2022-12-07 17:25:39 +00:00
Marcin Szkudlinski b033740402 mtl: add support L3 (IMR) heap
L3 memory should support have support
for allocating/freeing memory
A heap support in L3 is introduced by
this commit

Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2022-11-30 13:43:10 +00:00
Marcin Szkudlinski bb9e2cc147 move HPSRAM heap size def to zephyr adsp_memory.h
The heap size def should not be in alloc.c
This is a platform specific setting
Also (unused by now) macros regarding IMR bootloader
have been removed - moved to Zephyr

Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2022-11-30 13:43:10 +00:00
Marcin Szkudlinski 51c2bc1eb6 IMRheap preparation - cleanup in alloc.c
A quick cleanum in alloc.c
 - code style
 - code not relevant to CAVS/ACE

Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2022-11-30 13:43:10 +00:00
Marcin Szkudlinski 315962c4d7 zephyr: move memory allocation code 1:1 from wrapper.c to alloc.c
to have more order in the code - move memory code from a huge
common wrapper.c to specific lib/alloc.c
Note there is NO changes in the code, code is as it was before

Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2022-11-21 17:09:52 +00:00