This patch adds to equalizer capability to process 16 and 24 bit
pipelines in addition to 32 bit similarly as IIR. The generic C,
HiFiEP, and HiFi3 versions are updated with the capability.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
ipc_platform_do_cmd will send a standard reply when ipc_cmd() return 0.
So, we don't need to send a specific reply in ipc_dma_trace_config().
Signed-off-by: Bard liao <bard.liao@intel.com>
This patch simplifies new() function code and avoids unnecessary
allocation of component device and data resources if the the coefficient
blob is rejected due to size. The change is identical for FIR and IIR
EQs.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
SOF_ABI_VERSION macro now performs bitshift and addition to compose
final version number out of SOF_ABI_MAJOR, SOF_ABI_MINOR and SOF_ABI_MICRO
components.
Also added SOF_ABI_VERSION_INCOMPATIBLE macro to allow for easier comparison
between FW ABI version and client applications.
Signed-off-by: ArturX Kloniecki <arturx.kloniecki@linux.intel.com>
dai clocks ungated and resources allocated on the first use.
dma clocks ungated and resources allocated on the first use.
cores clocks gated in idle.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
Multiple alloctions of SG elements linked as a list
replaced with single allocations of arrays.
- The code flows (esp. cleanup-on-error) are simplified,
- number of 64bytes chunk allocations reduced from 18 to 12 for
example very basic topology, no increase in other areas
(2-period sgls still fit),
- more efficient allocation for host page tables on legacy platforms;
instead of going from a desc array to the list that is copied to
another list, there is just a single allocation of array moved
to the destination component.
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
Adds notifier to core_context, which is the first step
of multicore notifier implementation.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Implements timer driven scheduling by processing
DW DMA data in tasks added to work queue instead
of registering for DW DMA interrupt. Data processing
by default will happen every 1 ms.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
This patch fixes a regression caused by commit
b5308ee8e6. The HEAP_RUNTIME_SIZE
calculation equation macro missed this buffer totally.
The number of 1k buffers is also increased to four to reach size
that is multiple of 4096 like other buffer pools. Non-4096 size
seems to cause DSP panic.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Move definitions into header that would be shared between SOF and SOFT.
Paste SOF_ABI_VERSION into FW ready message.
Also remove unused code from uapi/logging.h.
Signed-off-by: ArturX Kloniecki <arturx.kloniecki@linux.intel.com>
This patch adds a single 1024 bytes buffer into heap for e.g. rzalloc()
usage. The FIR EQ code didn't trace the allocation failure so it's added
to see better if this happens. The 1k allocation for PCM samples delay
line is quite typical since a 32 bit 100 tap stereo FIR will need 800
bytes.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Reorganize definitions of macros to enhance visibility of trace_event()
macro. Add proper comment about it's usage.
Fill in missing definitions when TRACE is defined 0, to avoid compilation
issues.
Signed-off-by: ArturX Kloniecki <arturx.kloniecki@linux.intel.com>
Changes method of calculation next work queue tick.
Instead of taking actual time of last tick, lets use
time of requested tick. From my experiments, it can
take up to ~40 cycles from requested time
of interrupt until interrupt handler is executed.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Fixes panic at core power down. Panic happened due to
the waiti check, where we expect waiti to be executed
on irq level 0 and cpu power down happens on idc task
irq level. This is OK, because core is going to be
reset anyway.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Fixes cache issues with multicore processing of multiple pipelines:
- Changes pipeline_cache method as previous implementation
could not work, especially for invalidation.
- Allocates dma and dai private data in uncached memory,
because those resources are shared between different
pipelines, so potentially also between different cores.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
A mechanism similar to the one used for dma applied.
Dai initialization moved to separate unit from the main platform
code for cavs.
Optional dynamic discovery and initialization possible before
making available to other fw units via the lib hub.
SSP count cleaned up for cavs (important pre-work
for clock gating).
Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
Pan Xiuli