Commit Graph

4927 Commits

Author SHA1 Message Date
Janusz Jankowski 6d76acf67a debug: remove dead assignment
Reported by clang's scan-build.

Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
2020-04-10 16:58:12 +01:00
Tomasz Lauda c412a8559e host: optimize copy by removing condition statements
Optimizes host copy function by removing checks for copy type
and using preconfigured callback instead.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2020-04-10 16:21:42 +01:00
Adrian Bonislawski 162c3988b8 tgl: enable slave core boot with alternate reset vector
disable CONFIG_NO_SLAVE_CORE_ROM for tgl to use alternate reset vector

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 6d5b7cf128 arch: add alternate reset vector
move lp sram heaps to put alternate reset vector sections at the beginning
 add AltBootManifest section with entries to unpack
 alternate reset vector asm and cmake link
 unpack lpsram sections in master core boot

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 82fee903b7 tgl: L1 init defines
used to init L1 memory in alternate boot for slave cores

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski a71c82d78b cpu: turn on core memory as first step to enable core
this will allow to access memory from the very beginning
and avoid problems in potential future changes

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski be083cf350 cpu: unpack dynamic vectors
This will allocate memory for dynamic vectors, unpack them
from WindowOverflow4 and setup global vecbase pointer used
in alternate reset vector

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 5598a1c0b8 tgl: add dynamic vectors size
needed for alternate boot for slave cores

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski d7f553f1a8 rimage: use lma if available
some sections may use different lma than vma address,
in such case rimage needs to use lma

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 8294cf3d51 rimage: show LMA and VMA in section view
Sometimes they will be different and this will make developer
aware of the differences

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 2ff3056a92 kconfig: add CONFIG_NO_SLAVE_CORE_ROM
Add CONFIG_NO_SLAVE_CORE_ROM to determine how to boot slave cores

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 359eb0b255 pm_runtime: correct PWRCTL + power waiting
To make sure core is powered correctly when we move on

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski ac536b3776 pm_runtime: add trace error
trace_power_error was not defined

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 27e0450e36 tgl: allow to include interrupt.h in asm
It will allow to use TGL IRQ defines in asm

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 4efa6ed73f arch: add missing ATOMCTL register for slave cores
Some instructions like s32c1i depends on ATOMCTL register settings
and it should be set for slave cores to works properly and not hang
on these instuctions

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Tomasz Lauda a2db8e52cf schedule: dox: complete api documentation
Cleans up existing documentation and adds missing one.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2020-04-10 14:45:49 +02:00
Tomasz Lauda 1c2f3c0ce5 schedule: return status of operations
Changes schedule operations to return error in case
chosen scheduler is not found or scheduler doesn't
support mandatory operation.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2020-04-10 14:45:49 +02:00
Tomasz Lauda 0a57497bc8 schedule: remove unused header
Removes inclusion of unused header.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2020-04-10 14:45:49 +02:00
Artur Kloniecki 101364dc28 audio stream: Replace old API usage in clients with new one.
Some components used stream.free/avail fields directly. With introduction
of audio_stream_get_free/avail getter functions, such usage should be
removed.

Signed-off-by: Artur Kloniecki <arturx.kloniecki@linux.intel.com>
2020-04-10 11:51:18 +01:00
Artur Kloniecki ee3f7d9737 audio stream: Introduce underrun/overrun_permitted fields.
Add underrun_permitted and overrun_permitted fields to audio_stream
structure and initialize them with regard to associated buffer config.
Add audio_stream_get_avail/free functions, which take above-mentioned
fields into account and use them in getter functions within audio_stream.h
instead of avail/free fields directly.

Signed-off-by: Artur Kloniecki <arturx.kloniecki@linux.intel.com>
2020-04-10 11:51:18 +01:00
Marc Herbert edb2c60054 CI: Travis: disable host-testbench as long as it ignores errors
See https://github.com/thesofproject/sof/issues/2752

host-testbench.sh exits with success 0 when tests fail. Random, recent, all
green example in PR #2751:

https://travis-ci.org/github/thesofproject/sof/jobs/672996210 is green but:

  eqiir test failed!

I didn't even have to spend time to search for this example, I only
looked at the most recent PR.

Ignoring failures is the very worst type of validation issue because it
makes everyone think everything is OK when it's not. Hides regressions.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2020-04-10 10:53:16 +01:00
Sebastiano Carlucci 9915b803f7 audio: dcblock: Fix int overflow issue in dcblocker
This patch fixes an integer overflow issue that can occur in the
dcblocker. The overflow happened when doing x - x_prev. If x_prev
is sufficiently large (positive or negative), it can cause an overflow.

Casting x to a 64 bit int first fixes this issue.

Signed-off-by: Sebastiano Carlucci <scarlucci@google.com>
2020-04-09 13:04:37 +01:00
Daniel Baluta 5f7d4e268f drivers: imx: irqsteer: Fix computation of status
status of an output irqsteer line is a 64bit variable
composed of 2 x 32 bit registers.

Because first 64 output irqsteer lines only holds status for
IRQ in[0] we have a different formula for getting the status
compared to the existing implementation done for i.MX8QXP/i.MX8QM.

Mapping for status register is as follows:

line 0 -> [0 | chan0]
line 1 -> [chan2 | chan1]
line 3 -> [chan4 | chan 3]

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-04-09 09:11:18 +01:00
Daniel Baluta b4cce00e46 drivers: imx: irqsteer: Add IRQ fixup for mask/unmask
IRQSTEER module on i.MX8MP accepts 160 interrupts in 5
groups of 32 interrupts and steers them to an output of 3 lines.
Each output line has 64 interrupts.

The interesting part here is how the interrupts are steered and
how the registers are mapped.

Each 32 IRQ input group has 1 register for mask/set/status. Lets name
REGn the base of such registers. Then, according to the documentation
we have:

REG0 -> IRQ in[159:128]  }
REG1 -> IRQ in[127:96]   } =>  IRQ out[2] [191:128] from in[159:96]
REG2 -> IRQ in[95:64]    ]
REG3 -> IRQ in[63:32]    ] =>  IRQ out[1] [127:64]  from in[95:32]
REG4 -> IRQ in[31:0]     | =>  IRQ out[0] [63:0]    from in[31:0]

Notice that the original IRQ input interrupts are shifted with 32. When
computing the corresponding registers for an output register we need
to subtract 32 to get the correct register. This is achieved using
a fixup function which only applies for i.MX8MP.

Another important observation is that the IRQ in[31:0] is the single
valid group on output line 0. Thus in our represanation leaving a gap
with first 32 interrupts unused.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-04-09 09:11:18 +01:00
Daniel Baluta 8aac5d4c2c drivers: imx: irqsteer: Reduce irqsteer child nodes
On i.MX8MP irqsteer instance has only 3 output lines. So, reduce
the number of child nodes to 3.

Also, IRQSTEER on i.MX8MP has fewer input interrupts than on
i.MX8QM/i.MXQXP.

It has 160 input interrupts grouped as 5 lines of 32 interrupts, who
then are mapped on 3 output lines each with 64 interrupts.

The special case here is line 0 which holds only the first 32
interrupts. For this reason, we need to do:
	- start with first child at 0 instead of 32, because interrupts
	starting at 32 should be in a different child cascased
	controller.
	- fix formula for computing MASK/SET/STATUS registers
	- fix irqs register num.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-04-09 09:11:18 +01:00
Marc Herbert d62629152f CI: Travis: less VM isolation for speed-up. Remove matrix.
Looking at any recent Travis build log:

1. more than half the time is spent in the exact same "docker pull"
   command,
2. The qemuboottest stage rebuilds again the exact same thing than the
   previous test stage.

Fix 1. by re-using the same docker instance for multiple platforms.
Fix 2. by dropping from the test stage builds performed again in
the qemuboottest stage.

Random sample before:
  Total (VM) time  1 hr 15 min
  Real time             25 min (depends on current Travis load)
After:
  Total (VM) time       30 min
  Real time             10 min (depends on current Travis load)

The price to pay for this matrix reduction and speed up is coarser
reports in case of failure. Considering these tests are the most basic
possible one expects them to be rarely ever broken.

Remove the top-level matrix expansion as it was becoming impractical for
these heterogeneous builds ("PLATFORM=tools"?!). The combination of the
matrix and YAML anchors was not very obvious. Use YAML anchors
exclusively.

Rename default stage "test" to "buildonly"

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2020-04-09 09:09:50 +01:00
Sebastiano Carlucci 4223d87bbe audio: dcblock: Fix doxygen error for dcblock.h
This commit fixes a doxygen issue caused by a mismatch between
dcblock_find_func()'s declaration and its corresponding comment block.

Signed-off-by: Sebastiano Carlucci <scarlucci@google.com>
2020-04-09 08:51:46 +01:00
Marcin Maka 939c14cd2b comp: use list_relink in make_shared
Previous version worked only for empty lists.
There is potential case when buffer is already connected to
some local buffer on either end and then connected to a
buffer on another core which calls make_shared expected
to preserve existing links.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-08 22:13:35 +01:00
Marcin Maka c9e2f515c2 list: add relink operation called after the list is moved
Updates next/prev pointers with the new address of the list
head.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-08 22:13:35 +01:00
Marcin Maka a00f42b0a4 comp: replace rrealloc with platform method for shared objects
Rrealloc is a very expensive method and may fail for a large
component. There is existing platform specific method to "convert"
local objects into shared ones which is very quick on existing
platforms.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-08 22:13:35 +01:00
Tomasz Lauda d29ebe8fe6 pipeline: atomic schedule of connected pipelines
Implements atomic scheduling of connected pipelines that
supposed to be triggered at the same time. If the trigger
is propagated to the connected pipelines, then the expectation
is that they should be started at the same system tick.
Otherwise it might potentially lead to losing some samples
at the beginning for one of the pipes.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2020-04-08 19:36:31 +01:00
Bartosz Kokoszko a716056c4b tgl: use additional CHANNEL define in rt711 + rts1308 tplg
This commit adds CHANNELS define in sof-tgl-rt711-i2s-rt1308.m4
topology in order to properly set pipeline pcm channels and dmic
configuration (STEREO_PDM0 or FOUR_CH_PDM0_PDM1 mode).

Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
2020-04-08 19:32:14 +01:00
Seppo Ingalsuo 37850f5747 DMIC: Rename DMIC IPC struct field reserved_2
Since the SOF kernel and firmware headers need to be the same the
rename is also done on firmware side. The fifo_bits_b parameter was
deprecated in firmware ABI version 3.0.1 and the value has been
ignored. Since the kernel sets this in case of ABI version 3.0.0 or
earlier the name reserved_2 is not appropriate.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2020-04-08 19:30:53 +01:00
Seppo Ingalsuo 22b193f3fa DMIC: Fix a typo in header file comment text
This patch fixes the topo in word "microphone".

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2020-04-08 19:30:53 +01:00
Seppo Ingalsuo 5675fc0050 DMIC: Change IPC in dmic_set_config() to use a fixed length struct
This patch was created due to kernel driver code enhancement.
The DMIC was the only DAI type that used variable length arrays for
configuration IPC. It complicated the driver topology parsing more
than necessary. Since the header files for IPC are common also the
firmware side needs similar changes.

The flexible array member pdm[] is changed into a fixed array of
four that is the max. number of stereo PDM controllers in the current
Intel platforms. The DMIC driver code needs minor changes to correctly
handle the changed IPC struct size.

The IPC logic remains as before: The IPC PDM entries do not
correspond to hardware PDM controllers. They are applied per provided
index in each entry. Depending on number of PDM controllers there is
now zeros data after the last defined controller that will be
omitted.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2020-04-08 19:30:53 +01:00
Daniel Baluta 2bd247f77d platform: imx8m: dma: Add SDMA3 specific data
On i.MX8MP the DSP can make use of two SDMA controllers.
SDMA2 info was already added. This commit adds info for SDMA3.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-04-08 13:12:15 +03:00
Marc Herbert d92d3e9883 CI: travis: add doxygen stage
Before this new stage, doxygen was run only in a completely different
repo (sof-docs). So it was possible to submit totally broken doxygen
changes and get no doxygen feedback at all from CI before merge.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2020-04-08 10:53:21 +01:00
Marcin Maka 717e8395a3 buffer: tell realloc to not copy the old content
buffer_set_size() reinitializes the buffer object to empty
state by a call to buffer_init(), so no point in copying
the old content in rbrealloc.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-08 10:51:37 +01:00
Marcin Maka 370b118c04 alloc: add SOF_MEM_FLAG_NO_COPY to skip copy in realloc
Sometimes only reallocation is needed and old content is
discarded by the client anyway. No need to call memcpy
in this case.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-08 10:51:37 +01:00
Marcin Maka e306d1293e alloc: fix potential oob in rbrealloc
Previous memcpy of bytes is unsafe if new object is larger
then old one.

Typically realloc retrieves the old size internally and does
not need this information passed as argument but sof heap
implementation does not store the exact size of the allocated
memory buffer.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-08 10:51:37 +01:00
Marcin Maka d8e3f63af6 alloc: fix reference to rbrealloc in dox
Wrong function names used in documentation of rrealloc().

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-08 10:51:37 +01:00
Marcin Maka 75b8c1e8f8 alloc: fix potential oob in rrealloc
Previous memcpy of bytes is unsafe if new object is larger
then old one (which is probably most popular realloc use).

Typically realloc retrieves the old size internally and does
not need this information passed as argument but sof heap
implementation does not store the exact size of the allocated
memory buffer.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-08 10:51:37 +01:00
Marc Herbert 5e3bc9c11c tools/test: silence alsatplg in tlpg-build.sh unless VERBOSE=1
With this commit:
                  ./scripts/build-tools.sh -t -f | wc -l
     525
VERBOSE=anything  ./scripts/build-tools.sh -t -f | wc -l
  137030

This a followup to commit aa6c0f2ad1 ("topology: cmake: silence super
chatty alsatplg unless VERBOSE=1")

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2020-04-08 10:02:27 +01:00
Marc Herbert b2b4abffb3 kpb: fix broken doxygen link to kpbm-state-diagram
As reported by PR #2741:

sof/src/include/sof/audio/kpb.h:46: warning: explicit link request to 'kpbm' could not be resolved

Fixes: 36d4c9f8f6 ("kpb: add new state")

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2020-04-08 09:52:34 +01:00
Guennadi Liakhovetski 49dbfdaf54 topology: add a "core" parameter to the W_TONE() macro
This places all SectionWidget.TONE* topology widgets, created by
the W_TONE() macro on the same core, on which the respective pipeline
is scheduled.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2020-04-08 09:30:02 +01:00
Guennadi Liakhovetski 6522872c92 topology: add a "core" parameter to the W_MUXDEMUX() macro
This places all SectionWidget.MUXDEMUX* topology widgets, created by
the W_MUXDEMUX() macro on the same core, on which the respective
pipeline is scheduled.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2020-04-08 09:30:02 +01:00
Guennadi Liakhovetski ce5ed2d322 topology: add a "core" parameter to the W_MIXER() macro
This places all SectionWidget.MIXER* topology widgets, created by
the W_MIXER() macro on the same core, on which the respective
pipeline is scheduled.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2020-04-08 09:30:02 +01:00
Guennadi Liakhovetski 90dd7909c7 topology: add a "core" parameter to the W_KPBM() macro
This places all SectionWidget.KPBM* topology widgets, created by
the W_KPBM() macro on the same core, on which the respective pipeline
is scheduled.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2020-04-08 09:30:02 +01:00
Guennadi Liakhovetski b735047b91 topology: add a "core" parameter to the W_DETECT() macro
This places all SectionWidget.DETECT* topology widgets, created by
the W_DETECT() macro on the same core, on which the respective
pipeline is scheduled.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2020-04-08 09:30:02 +01:00
Guennadi Liakhovetski 6fe1f343fc topology: add a "core" parameter to the W_DCBLOCK() macro
This places all SectionWidget.DCBLOCK* topology widgets, created by
the W_DCBLOCK() macro on the same core, on which the respective
pipeline is scheduled.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2020-04-08 09:30:02 +01:00