In IPC4 the individual channel gains are passed in separate
messages. One channel may have started to ramp to a new gain
while a new channel gain arrives for other channel. If the
gain is same as the previous control value, the ongoing ramp
is stopped and the gain remains at a transition value.
The incorrect code is not fixed but instead the volume_set_volume()
function is simplified. When a volume control is received, it is
assumed that pass-through mode is disabled and ramp is prepared. If
the control is received but gains are not changed, the ramp mode
is finished and pass-through is restored in ramp function.
The volume_set_switch() function is updated similarly to ensure
similar operation.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch refines the initialization process for secondary cores in a
multicore environment when using Zephyr as the RTOS. The patch
introduces a `check_restore` function specifically for Zephyr, which
checks if basic core structures (IDC, notifier, schedulers) have been
previously allocated and are still present in memory, indicating that
the system is not undergoing a cold boot.
By adding this check, the system avoids unnecessary re-allocation of
these structures during the power-up sequence of secondary cores,
effectively preventing the memory leak observed during repeated power
cycle tests.
fix#9005
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch refactors the `check_restore` function to return a `bool`
instead of an `int`. This change enhances code readability and clarifies
the intent of the function, which is to return a true or false value
based on the presence of core structures in memory.
No functional changes are introduced by this patch; it is purely a code
quality improvement.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This commit adds an overlay enabling kernel traces from
Zephyr.
Those traces may be read on the host side from memory window
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
The widget name size will exceed the character limit and lead to below
error
failed to find module info for widget
alh-copier.SDW0-Playback-SimpleJack.0 with UUID
00000000-0000-0000-0000-000000000000
Shorten the stream name to fix it.
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Add constraints on valid pipeline priority values and document
the semantics so that 0 is considered the highest priority and such
pipeline should be run first.
The range matches definitions in include/ipc4/pipeline.h and
SOF_IPC4_MAX_PIPELINE_PRIORITY.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Use ibs/obs size from ipc4_base_module_cfg to properly calculate
period_count. It is especially important when FW aggregation mode
is enabled and there are multiple DMAs allocated under one copier
instance. That way period count for every DMA will be correctly
evaluated and used for DMA buffer size calculation.
Signed-off-by: Ievgen Ganakov <ievgen.ganakov@intel.com>
This device has RT711 on link0, RT1316 on link3 and 2 PCH-attached DMICs.
Add 3 configurations with no DMIC, 4 DMIC and 2 DMIC. For now no
support for -pdm1.
Link: https://github.com/thesofproject/linux/issues/4880
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
The IIR files export overwrites the FIR files due to mistake
in the script.
Fixes commit 5ddbd34ba9 ("Tools: Tune: EQ: Add tplg2 blobs create")
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch addresses an issue where audio output could be silent due to
the direction property of pipeline components not being set. The problem
manifests when the pipeline is initialized in the sequence:
Init -> Reset -> Pause -> Ready
In this scenario, the direction property may remain unset, leading to
incorrect pipeline behavior.
In flow of transitions: Init -> Pause -> Ready, this issue does not occur
because the firmware attempts to set the directions in pipe components
during the transition from Init to Pause. This step is skipped if Pause
is done after Reset, which is the scenario that this patch addresses.
The added code ensures that if the source component's direction is unset
but the sink's direction is set, or vice versa, the direction is copied
from the set component to the unset one. This synchronization of the
direction property guarantees that the pipeline's data flow is correctly
established.
This synchronization of the direction property guarantees that the
pipeline's data flow is correctly established, allowing the
`pipeline_for_each_comp` function to traverse and process all components
as intended, thus resolving the silent audio output problem.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
In psy_get_mel_filterbank() if fb->slaney_normalize isn't set, 3
variables are reset to the same values needless every loop iteration.
Move initialisations outside the loop instead.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The value assigned to the module_entry_point field in the module_data
structure wasn't used anywhere. This field has been removed.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The unused sys_service field has been removed from the processing_module
structure. It was never initialized anywhere, and its value was passed as
a parameter to the native_system_agent_start function which did not use it.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The value stored by the Processing Module Adapter in the module_adapter
field of module_data structure has been moved to an unused private field.
This change allowed the module_adapter field to be removed.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The code allocating/freeing in_buff and out_buff buffers, which were not
used, was removed from the processing module adapter.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
To ensure proper operation of native loadable modules it is necessary to
bypass Processing Module Adapter used by IADK modules. This is currently
done by overriding the pointer to module_interface used by the Module
Adapter. Thanks to this, the Module Adapter directly calls functions
provided by native module. As in this case the Processing Module Adapter
functions are omitted, support for native libraries are removed from it as
it is no longer needed. This leads to remove modules_process_raw and
modules_process_audio_stream functions.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
During DMA stop/config/start the read/write pointer of HD-DMA is not
reset unlike other DMAs (GPDMA, DMAC).
Only call the audio_stream_reset() if the link is not serviced by HD-DMA.
Link: https://github.com/thesofproject/sof/issues/8986
Fixes: 9831a9ded7 ("audio: dai-zephyr: reset DMA buffer cursors on TRIGGER_RELEASE")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Every Linux developer should use deployable builds by default.
Until Peter Ujfalusi's very recent work in this script, we had a
complete `/lib/firmware/` structure disconnect between the IPC4 output
of this script and the IPC4 expectations of the Linux kernel. To
workaround this disconnect, every CI and Linux developer used to
implement duplicate and inconsistent firmware deployment hacks.
People crafting sof-bin releases also had to organize IPC4 releases
manually, which was extremely error-prone and with limited test
coverage (Thanks Kai and Mengdong!)
Now that Peter gracefully fixed the layout, documented it in sof-docs
and implemented it in this script, the time for all Linux developers to
drop their inconsistent deployment hacks is overdue. All these hacks
must be replaced with a simple, one-line recursive copy which makes sure
the layout committed in version control is constantly tested by
everyone.
So, make deployable builds the new default.
The new default will also help with sof-bin releases, making sure they
use a well tested /lib/firmware/ layout.
The --no-deployable-build was recently introduced to help minimize
disruption and migration effort for people and automation who do NOT use
Linux. The `/lib/firmware/` directory structure is irrelevant outside
Linux (but everyone is of course free to choose it)
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Enables extraction and injection probes for LNL platform.
NOTE: this commit does NOT enable probe log backend.
Signed-off-by: Grzegorz Bernat <grzegorzx.bernat@intel.com>
Contains the following squashed SOF commits:
nxp: imx8ulp: change SOC name to MIMX8UD7
zephyr: CMakeLists.txt use new `CONFIG_SOC_C` for 8ULP
cmake: update configs for NXP ADSP
and the following Zephyr patches affecting SOF:
951763939034 nxp: imx8ulp: change SOC name to MIMX8UD7
b8214b673970 dts: xtensa: nxp_imx8: add SAI1 node
a0e32f07ef76 dts: intel_adsp: ace: update host dma copy alignment
3fde2c50c6ef tracing: add intel ADSP memory window backend
6b9d01f995c7 intel_adsp/ace: power: No pending transaction before power gate
6ea749de5283 arch: rename arch_start_cpu() to arch_cpu_start()
b69d2486fee6 kernel: rename Z_KERNEL_STACK_BUFFER to K_KERNEL_STACK_BUFFER
1f55be8b42df nxp: imx8: change CONFIG_SOC_<name> to match the value
688fbb53aeb2 intel_adsp: ace: Fix sparse error
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
The latency value is in number of periods (1ms) while the buffer allocated
for the DAI copier is at least 2 periods.
This can shoot up the calculated stream_start_offset resulting invalid
delay reporting.
Use the period size of the DAI copier to correct this error.
The kernel reported delay currently (on normal non DeepBuffer PCM):
at start: ~302 frames
after 20x pause/resume: ~6530 frames
With this patch:
at start: ~254 frames
after 20x pause/resume: ~3600 frames
The drift rate is about the same with DeepBuffer.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Starting with this commit, i.MX93 now uses the timer domain
in conjunction with the Zephyr native drivers.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit introduces the necessary changes to the overlay
and configuration files required for enabling the Zephyr native
SAI, EDMA and HOST DMA drivers on i.MX93.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Bump up Zephyr revision to fetch a Zephyr version that
contains the following patch:
1) 64ba1b221091c343f7cca79a7970981eb1ff3a35
("dts: nxp: imx93: add nodes for SAI3 and EDMA4")
This is required for the transition to Zephyr native drivers
on i.MX93.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
The BT codec used by the IW416 chip expects FSYNC to be
asserted for only one BCLK. Also, FSYNC should be active HIGH.
As such, change from I2S protocol to DSP_A protocol since the
configurations made for this protocol inside the SAI driver
are more suited.
Also, by default, the BT codec drives data on BCLK rising
edge and samples it on falling edge. With the DSP_A protocol,
the SAI driver also has the same configuration, which is wrong
since we can't drive and sample on the same edge and cycle. As such,
invert BCLK polarity such that the SAI will drive on rising edge
and sample on falling edge.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
8ULP has two supported BT HFP scenarios: NBS and WBS. For
NBS the frequency of FSYNC is 8k, while for WBS the frequency
of FSYNC is 16k. Since the BCLK is computed as:
Freq(BCLK) = TDM_SLOTS * TDM_SLOT_WIDTH * Freq(FSYNC)
then that means we're going to end up with two different BCLK
frequencies (one for each supported scenario).
Currently, what we do is pass the frequency of FSYNC
as a build argument, while keeping the frequency of BCLK
constant (set to 256000, which would be the same value as the
one used in WBS). This causes the following issues:
1) The Zephyr native SAI driver returns an error
when trying to commit the configuration because the
frequency of BCLK doesn't abide by the aforementioned
formula.
2) We end up consuming twice as many samples in a given
unit of time.
To fix these issues, use the aforementioned formula to compute
the frequency of BCLK.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Rename the `RATE` parameter to `FSYNC_RATE` in order to
remove ambiguity regarding what the parameter is.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
KPB draining task is executed by low priority preemptible EDF thread.
The task accesses KPB sink buffer and calls comp_copy() for component
connected to sink. If LL thread preempts draining task that could result
in broken state of sink buffer or component connected to sink. This fix
prevents LL from preempting draining task in bad moment.
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
The IDC message objects are stored to static "idc_work", so
the cache operations are unnecessary when pointers to these
messages are passed around.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
All topologies are built in parallel. The same name will lead
to file overrides. Therefore, correct to use the respective file
names properly.
Signed-off-by: Mac Chiang <mac.chiang@intel.com>
The CHAIN_DMA has been replaced with HDMI_USE_CHAIN_DMA, which was already
enabled by default on iDisplay HDAudio codec in hdmi-default.conf.
Signed-off-by: Mac Chiang <mac.chiang@intel.com>
- list_is_empty is required to properly check source list
- at this stage empty list is allowed since source bind might not
happen yet
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
When Google RTC AEC is not ready to launch, it shouldn't be included
in production builds for Chromebook. This commit removes Google RTC
AEC from the current variants while making another copy with suffix
"-google-aec".
Signed-off-by: Pin-chih Lin <johnylin@google.com>
Contains following updates affecting SOF targets:
81658e67e7c0 dts: xtensa: intel_adsp: Remove ALH nodes from ACE 2.0 LNL DTS
4ea52bdd1297 soc: xtensa: intel: Update power status bitfields for LNL
a39a61015c59 dts: xtensa: intel: Reorder LNL power domains
64a81ffb23ba dts: xtensa: intel_adsp: ace15: Update power domain for hda link nodes
ff2dd7f25a99 dts: xtensa: intel: Reorder ACE 1.5 power domain nodes
315ee38b95a2 ADSP: don't use timer interrupts on secondary cores
e914c60ae156 boards: intel_adsp: fix dead link
010f39a409e0 soc: intel_adsp_cavs: store PS when power gating secondary core
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The DRC component was not included to build. This change
avoids error and DSP panic in topology load.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Add a GitHub workflow entry to build with LLEXT enabled, using the
Zephyr toolchain.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The DMAC has the same view of the address space as the HOST.
As such, the source and destination addresses need to be converted
to HOST-relative addresses before attempting to perform a DMA
transfer. This is only relevant for platforms for which the DSP
and HOST have different views of the address space (e.g: i.MX8ULP).
Also, if a platform doesn't define the `local_to_host` macro
(used for converting DSP local address to HOST-relative address)
we assume that the HOST and the DSP have the same view of the
address space. As such, we also add a definition of `local_to_host`
which will just return the passed address.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
The declare_dynamic_module_adapter function has been moved from
module_adapter/module/modules.h to lib_manager and renamed to
lib_manager_prepare_module_adapter. It was and still is only used in
lib_manager.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Moved pointer to module_interface from struct module_data to comp_driver
structure. The change is aimed at clearing the module_data structure of
fields intended for exclusive use by sof. All modules are eventually use
module interface so this pointer will be in comp_driver anyway.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Seppo Ingalsuo