Commit Graph

10 Commits

Author SHA1 Message Date
Seppo Ingalsuo 76754b52d0 App: Intel: Enable Aria build for TGL and TGL-H platforms
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-10-20 12:35:53 +03:00
Seppo Ingalsuo 8d01ad69a7 Kconfig: Enable crossover and multiband-DRC by default
This patch enables for TGL and MTL platforms as default
to enable CI build tests, etc.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-08-30 16:01:59 +01:00
Kai Vehmanen 59028ad3d1 drivers: Intel: remove Intel XTOS drivers
Now that Intel cAVS2.5 has been migrated to use native Zephyr
drivers, we have no need to keep the Intel specific XTOS
drivers in the tree anymore.

Adjust board configuration files to not refer to removed
Kconfig options.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-08-21 12:21:55 +03:00
Kai Vehmanen 9948d439d9 app: Intel: switch cAVS2.5 configs to use IPC4 by default
The IPC3 build is no longer supported for Intel cAVS2.5 target,
so move the config overlay definitions as-is to the main
board config file.

To smoothen the transition, keep an empty IPC4 overlay file
in the tree to allow developers to update build scripts.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-08-21 12:21:55 +03:00
Peter Ujfalusi 3a17cde8fc board: intel_adsp_cavs25_tglh: Enable support for library loading
Add the needed config options to enable the library loading support.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2023-08-17 13:28:11 +01:00
Peter Ujfalusi 1411dd6607 board: intel_adsp_cavs25_tglh: Disable DTRACE
DTRACE is IPC3 only, it is not used anymore.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2023-07-20 12:12:46 +03:00
Rander Wang 7a7dfb810d zephyr: enable core dump on tgl platforms
We need to enable CONFIG_DEBUG_COREDUMP_MEMORY_DUMP_MIN according to
comments in coredump_core.c: When dumping minimum information, the
current thread struct and stack need to be dumped so debugger can
examine them.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2023-06-06 17:39:58 +03:00
Piotr Makaruk 507ad53b48 tgl-h: hda: enable chain dma
Enable building chain dma component on TGL-H platform

Signed-off-by: Piotr Makaruk <piotr.makaruk@intel.com>
2023-01-19 15:37:32 +01:00
Andrey Borisovich f8e111eb27 intel: drivers: dmic refactor - move DMIC_HW_IOCLK to Kconfig
Moved hardcoded cycles values for DMIC IO from dmic.h header
to per-platform configuration file (defconfig files for
non-Zephyr builds and app/boards for Zephyr builds).
Added new entry to intel drivers Kconfig - CONFIG_DMIC_HW_IOCLK.
Modification of this clock value may be used for testing purposes
like building firmware for FPGA or simulator.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2022-08-29 13:22:04 +01:00
Anas Nashif 00c407f8c9 zephyr: app: move main SOF app from zephyr samples
Make the main SOF app part of SOF, where it belongs. No need for any
overlays (which just duplicated the sample .conf anyways) and one place
to build everything.

This now does not depend on zephyr samples, which have a different
purpose completely.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-18 14:22:01 +01:00